Fujitsu Corporation

Yoshimi Yamashita

Sumio Yamamoto

Kinjiro Kosemura

Keiji Ikeda

Akira Endoh

Shigeru Kuroda

Kei Horiuchi

Hidetoshi Ishiwari

Hiroshi Nakao

Naoto Horiguchi

Fumiaki Kumasaka

Noriaki Nakayama

Yasuo Nara

A channel layer () made of compound semiconductor and a barrier layer () made of compound semiconductor having a band gap wider than the channel layer are formed over a substrate. A gate insulating film () made of first insulating material is formed on the barrier layer over the channel region. A gate electrode () is formed on a partial area of the gate insulating film. A protective film is disposed on the gate insulating film on both sides of the gate electrode. The protective film comprises a lower protective film () made of second insulating material whose etching resistance is different from the first insulating material and an upper protective film () made of third insulating film whose etching resistance is different from the second insulating material. A source electrode and a drain electrode are electrically connected to the channel layer on both sides of the gate electrode.

Semiconductor device having MIS structure and its manufacture method

In a nitride-system semiconductor, being different from GaAs and Si, Schottky barrier heights &#x3a6;change significantly against work functions &#x3a6;of metals. Then, for example, on an HEMT in which a buffer layer and a barrier layer constituted by nitride-system semiconductors are sequentially formed on a substrate, and a gate electrode is formed on the barrier layer, when a metal having a relatively large work function &#x3a6;is selected as a metal constituting the gate electrode, and the thickness of the barrier layer is adjusted so that the Schottky barrier height &#x3a6;becomes larger as compared to a semiconductor surface potential &#x3a6;on both sides of the gate electrode, a two-dimensional electron gas cannot exist below the gate electrode even when no recess is formed on a portion immediately beneath the gate electrode on the barrier layer, so that the enhancement operation becomes possible.

Semiconductor device and method for manufacturing the same

A first film of rare-earth metal is formed on a semiconductor region of compound semiconductor exposed on a substrate. A second film essentially comprising silicon is formed on the surface of the first film. The first and second films are heated to silicidate at least a portion of the first film in contact with the second film. It is possible to lower the contact resistance of an ohmic electrode formed on semiconductor having a wide band gap.

Semiconductor device with ohmic electrode formed on compound semiconductor having wide band gap and its manufacture method

A ferromagnetic tunnel junction random access memory includes a ferromagnetic tunnel junction structure including a first ferromagnetic layer, a second ferromagnetic layer disposed adjacent to the first ferromagnetic layer and having a fixed magnetization, and a tunnel insulator layer interposed between the first and second ferromagnetic layers; a conductor plug penetrating the first ferromagnetic layer, the tunnel insulator layer and the second ferromagnetic layer along a center axis; a first selection line coupled to a first end of the conductor plug; and a second selection line coupled to a second end of the conductor plug opposite to the first end. The first ferromagnetic layer has a generally ring shape surrounding the conductor plug and is insulated from the conductor plug. One of the first and second ferromagnetic layers has an antiferromagnetic layer pattern on a portion thereof.

Ferromagnetic tunnel junction random access memory, spin valve random access memory, single ferromagnetic layer random access memory, and memory cell array using the same

Several ten thousands or several millions of juxtaposed hollow thin tubes, each having a diameter of, for example, 12 .mu.m and a length of 1 mm, are joined to each other to form a window having a predetermined open surface area. The window having a diameter of, for example, 30 mm, can withstand a differential pressure of several atm. A high-vacuum X-ray source and the window consisting of thin tubes having the aforementioned dimensions are connected through a differential evacuating device having a plurality of stages connected with a partitioning wall having an orifice of predetermined dimensions provided between the adjacent stages. The pressures at the two sides of the window are maintained to the atmospheric pressure and a pressure which is 1/10th of the atmospheric pressure, respectively. X-rays having a long wavelength of 10 .ANG. or above and emitted by a SOR device under a high vacuum can be illuminated on a sample provided in an environment at the atmospheric pressure at a high transmittance and over a wide area which cannot be achieved by a conventional Be window.

X-ray exposure apparatus

Irradiation equipment comprising a beam duct disposed along the synchrotron radiation beam, and a multistage axial flow turbine installed in the beam duct. The multistage axial flow turbine comprises a plurality of stators and rotors arranged alternately in an axial direction. Each stator has vanes and a beam transmission hole formed through the vane region. Each rotor has vanes and gaps between adjacent vanes. A plurality of beam transmission holes are aligned in a direction of the synchrotron radiation beam, and a plurality of gaps of the rotors are intermittently aligned in the direction of the synchrotron radiation beam, whereby the synchrotron radiation beam can intermittently penetrate through the multistage axial flow turbine through the beam transmission holes and gaps with rotation of the rotor.

Irradiation equipment for applying synchrotron radiation

Disclosed is a method of producing a compound semiconductor device comprising an enhancement-mode transistor and a depletion-mode transistor, each of which has a heterojunction and utilizes a two-dimensional electron gas. The method of producing the device comprises the steps of: forming an undoped GaAs channel layer on a semi-insulating GaAs substrate; forming an N-type AlGaAs electron-supply layer so as to form the heterojunction; forming an N-type GaAs layer; forming an AlGaAs layer; selectively etching the AlGaAs layer to form a recess; performing an etching treatment using an etchant which can etch rapidly GaAs and etch slowly AlGaAs to form simultaneously grooves for gate electrodes of the enhancement-mode transistor and the depletion-mode transistor, the bottoms of the grooves being in the N-type AlGaAs layer and the distance between the bottoms being equal to the thickness of the AlGaAs layer; and forming simultaneously the gate electrodes in the grooves.

Method of producing a two-dimensional electron gas semiconductor device

A compound semiconductor device comprises an enhancement-mode transistor and a depletion-mode transistor, each of which has a heterojunction and utilizes a two-dimensional electron gas. The method of producing the device comprises the steps of: forming an undoped GaAs channel layer on a semi-insulating GaAs substrate; forming an N-type AlGaAs electron-supply layer so as to form the heterojunction; forming an N-type GaAs layer; forming an AlGaAs layer; selectively etching the AlGaAs layer to form a recess; performing an etching treatment using an etchant which can etch rapidly GaAs and etch slowly AlGaAs to form simultaneously grooves for gate electrodes of the enhancement-mode transistor and the depletion-mode transistor, the bottoms of the grooves being in the N-type AlGaAs layer and the distance between the bottoms being equal to the thickness of the AlGaAs layer; and forming simultaneously the gate electrodes in the grooves.

HEMT with etch-stop

A method for producing a field effect type semiconductor device includes the steps of forming a semiconductor active layer on a substrate, forming a resist layer on the semiconductor active layer, exposing a first portion of the resist layer in accordance with a gate electrode pattern, carrying out auxiliary exposure of a second portion near the first portion after or before the exposure of the first portion. The method further includes developing the exposed resist layer, forming a recess in the semiconductor active layer by etching the exposed semiconductor active layer using the resist layer as a mask and forming a gate electrode on the surface of the recess using the resist layer as a mask. This method improves the series resistance between the source electrode and the gate electrode, and also improves the Schottky withstand voltage between the drain electrode and the gate electrode.

Method for producing field effect type semiconductor device

A method of electron beam exposure in which a plurality of sets of reference values for setting the conditions for electron beam exposure are found in relation to a plurality of sizing marks which are successively arrayed at positions in the vicinity of the pattern area of a specimen, and the exposure condition values corresponding to registration marks on the surface of the specimen are derived from these said reference values for setting the exposure conditions.

Growing community of inventors

Kawasaki, Japan

Yoshimi Yamashita