Kabushiki Kaisha Toshiba

Yoshiko Ikeda

Tomoko Matsudai

Tsuneo Ogura

Kazutoshi Nakamura

Yuichi Oshino

Ryohei Gejo

Atsushi Kameyama

Shinichiro Misu

Yuuichi Oshino

Toshiki Seshita

Hideaki Ninomiya

Masami Nagaoka

Katsue Kawakyu

According to one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode; a second semiconductor layer provided between the first semiconductor layer and the second electrode, and the second semiconductor layer having a lower impurity concentration than the first semiconductor layer; a first semiconductor region provided between part of the second semiconductor layer and the second electrode; a second semiconductor region provided between a portion different from the part of the second semiconductor layer and the second electrode, and the second semiconductor region being in contact with the first semiconductor region; and a third semiconductor region provided between at least part of the first semiconductor region and the second electrode.

Semiconductor device

According one embodiment, a semiconductor device includes: a first electrode; a second electrode; a first semiconductor layer provided between the first electrode and the second electrode and being in contact with the first electrode; a second semiconductor layer including a first part and a second part, and the second part being contact with the first electrode, and the second semiconductor layer having an effective impurity concentration lower than an effective impurity concentration in the first semiconductor layer; a third semiconductor layer provided between the second semiconductor layer and the second electrode, and having an effective impurity concentration lower than an effective impurity concentration in the second semiconductor layer; and a fourth semiconductor layer provided between the third semiconductor layer and the second electrode, and being in contact with the second electrode.

A collector layer of a first conductivity type is provided in the IGBT region and the boundary region and functions as a collector of the IGBT in the IGBT region. A cathode layer of a second conductivity type is provided in the diode region apart from the collector layer and functions as a cathode of the diode. A drift layer of the second conductivity type is provided in the IGBT region, the boundary region, and the diode region, the drift layer being provided on sides of the collector layer and the cathode layer opposite the first electrode. A diffusion layer of the first conductivity type is provided in the boundary region on a side of the drift layer opposite the first electrode.

The invention provides a high frequency amplifier in which a variable attenuator consisting of a bypass FET, which has a drain connected to a first-stage amplifying FET via a resistor, and a source grounded via a capacitor, is located on a main signal line leading to the gate of the amplifying FET, in order to control the gate potential of a bypass FET using a gain control voltage source, thereby varying the gain of the amplifier.

High frequency amplifier having a variable attenuator connected to the

A switching circuit is made by serially connecting two field effect transistors in series in a small-signal transmission path, each of the transistors being applied with a substantially equal voltage, so as to lower a voltage applied to each of the FETs in the OFF state by voltage division, with the result that a high withstand voltage of the transmission path can be attained and a linear output can be obtained even when a large electric power is transmitted.

Growing community of inventors

Kanagawa-ken, Japan

Yoshiko Ikeda