Oki Electric Industry Co., Ltd.

Yoshiki Nagatomo

Kazuya Suzuki

Hiroaki Uchida

Osamu Nanba

Shoji Yo

A first insulating layer is formed on semiconductor substrate, and a trench is formed in the first insulating layer. An amorphous silicon layer doped with impurities is formed on a side and bottom walls of the trench. Next, a resist material is partially filled in the trench so that an upper portion of the amorphous silicon layer is exposed. The exposed portion is implanted with impurity ions. After removal of the resist material, the amorphous silicon layer is heat treated so as to grow hemispherical grains on its surface.

Method of Fabricating a capacitor structure having hemispherical grains

An object of the present invention is to provide a semiconductor memory cell capable of ensuring a large surface area of each of a plurality of storage electrodes thereby to increase the capacity of a capacitive portion (capacitor) formed between the storage electrode and a cell plate electrode, in other words, greatly increasing the capacity of the memory cell and to provide a method of manufacturing the semiconductor memory cell. The storage electrode is structured so as to have oblique inclinations. A semiconductor memory cell is normally selected by applying a voltage to a word line so as to start up the word line. Thus, the reading of information from or writing of it into the selected semiconductor memory cell is performed. The information is transferred to the corresponding memory cell from the outside of the memory cell through its corresponding bit line. Alternatively, the information is transferred to the outside. The retention of the information in the memory cell is carried out by electric charges stored in the capacitor formed between the storage electrode and the cell plate electrode. Therefore, the greater the capacity of the capacitor, the higher the performance of the memory cell is made.

Semiconductor memory cell having storage electrodes with inclined

A method of forming an isolation region exerts no adverse influence upon steps after forming the isolation region and is, besides, capable of forming the isolation region having a narrow isolation width. After a mask has been formed of an oxidationproof material such as Si.sub.3 N.sub.4 on a silicon substrate, a field oxide is formed by effecting selective oxidation in a high-pressure dry oxygen atmosphere. Thereafter, a portion, protruded from the silicon substrate, of the formed field oxide is removed, thereby forming the isolation region.

Method of forming isolation region

In a semiconductor memory device, storage electrodes of two memory cells adjacent to each other are superimposed with each other, with their contours being substantially aligned. As a result, the storage electrodes are extended to cover two memory cell regions. The superimposed storage electrodes are electrically insulated from each other, and the upper storage electrode extends through the lower storage electrode.

Semiconductor memory device with superimposed storage electrodes

A method of manufacturing a low resistance contact structure for a semiconductor device wherein a polycide layer is formed on a semiconductor substrate, and the surface of the substrate is covered with an interlayer isolation layer which is provided with a contact hole over the polycide layer. After filling the contact hole with polycrystalline silicon or forming a polycrystalline silicon contact or a polycide structure contact which connects to the polycide layer at the contact hole, the structure is subjected to a short term and high temperature annealing treatment at a temperature over 900.degree. C.

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Tokyo, Japan

Yoshiki Nagatomo