Fujitsu Corporation

Yoshikazu Yamada

Koichi Kuroiwa

Shoji Taniguchi

Masami Kanasugi

Mahiro Hikita

Jun Iwata

Takanobu Kashiwagi

A receiving unit for receiving a CDMA system signal having a plurality of multipath components is intended to reduce the size. A receiving section receives a CDMA system signal. A storage section stores the signal received by the receiving section. A demodulation section demodulates each of multipath components included in the received signal stored in the storage section with a despreading code. A control section controls for demodulating a plurality of the multipath components by causing the demodulation section to perform a time division multiplex process. A Rake combining section performs the maximal ratio combining of output from the demodulation section to generate a demodulated signal.

Receiving unit and semiconductor device

A receiving unit, receiving method, and semiconductor device that reduce the size of circuits in a receiving unit. A receiving section receives signals sent from a base station and transmitted through a plurality of paths. A path tracking section detects timing of each of the plurality of paths through which the signals received by the receiving section were transmitted. A demodulating section demodulates the received signals by performing a despreading process according to the timing of the plurality of paths detected by the path tracking section. A correlation value calculating section calculates a correlation value between the received signals and a spreading code. A destination selecting section provides output from the correlation value calculating section to the path tracking section in the case of performing a path tracking process by the path tracking section and provides output from the correlation value calculating section to the demodulating section in the case of demodulating the received signals by the demodulating section.

Receiving unit, receiving method and semiconductor device

A semiconductor device that quickly saves data stored in an area to which power is supplied intermittently. Power is supplied intermittently to a first area. Power is supplied continuously to a second area. A memory is located in the second area. A save circuit saves data used in the first area in the memory before the supply of power being stopped. A restoration circuit restores data which has been saved in the memory to a predetermined circuit in the first area. A power supply control circuit supplies power to the memory if data has been saved in the memory. Otherwise the power supply control circuit stops the supply of power to the memory.

Memory device including backup memory for saving data in standby mode

There are provided an arithmetic unit and a receiver unit which execute an arithmetic operation at a high speed and allow reduction of the size thereof. An input section inputs data of the data group. First to n-th (n&#x3e;1) storage sections have a capacity capable of storing at least part or all of the data group. A readout section selects one of the first to n-th storage sections and reads out therefrom a data group already stored therein. An arithmetic section performs a predetermined arithmetic operation between the data group read out by the readout section and the data group newly inputted by the input section. A writing section writes a result of the predetermined arithmetic operation by the arithmetic section in a predetermined one of the storage sections, which is not selected by the reading section as the one from which the data group already stored therein is to be read out.

Arithmetic unit and receiver unit

A proposed semiconductor device is directed to making unnecessary circuit operation inactive to reduce power consumption because of leakage current. The device is functionally divided into blocks. The power supply systems of the blocks are divided into a non-controlled power supply group in which power is always on and controlled power supply groups in each of which groups a supply of power can be turned on/off independently. When a power supply system control part of the non-controlled power supply group outputs a control signal for power on, a power switch part turns on to release the controlled power supply group from the sleep mode, so that the first processing part starts intermittent operation. Only when it is determined that a first next-processing necessity determining part determines necessity of the next processing, a control signal is generated to activate the next power supply group. The blocks unnecessary for processing are not supplied with power, so that no leakage current flows and power consumption because thereof can be reduced.

Semiconductor device and portable terminal equipment

A semiconductor integrated circuit includes a plurality of functional blocks, each of which starts and stops an operation thereof in response to assertion and negation, respectively, of a corresponding command signal, a clock generation circuit which generates a clock signal, a clock control circuit which starts supplying the clock signal to each of the functional blocks in response to the assertion of the corresponding command signal, and stops supplying the clock signal to each of the functional blocks in response to the negation of the corresponding command signal.

Growing community of inventors

Kawasaki, Japan

Yoshikazu Yamada