Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Yoshikazu Hazuki

Takahiko Moriya

Masahiro Kashiwagi

A method of forming a multilayer interconnection for a semiconductor device comprising a first insulation layer deposited on a substrate having semiconductor elements, first interconnection patterns, a second insulation layer interposed between the first interconnection patterns, a third insulation layer covering the first interconnection patterns and second interconnection patterns contacted with the first interconnection patterns, wherein the first interconnection patterns are formed in such a manner by vapor phase growth process that the first interconnection patterns cover both edges of the interposed second insulation layer.

Forming multilayer interconnections for a semiconductor device by vapor

First conductive members are buried in first holes formed in a first insulating film to connect the second interconnection layers, formed through first and second insulating films, to a semiconductor substrate. Second conductive members are buried in second holes formed to be positioned on the first holes of the second insulating film. Thus, the reliability of a semiconductor device of a multi-layer interconnection structure is improved, and the integration thereof is improved.

Process for forming multi-layer interconnections

A method for producing a semiconductor device has the steps of forming an insulating film on an uneven surface of a semiconductor body; and dry etching the insulating film by using as an etchant a gas containing carbon-halogen bonds and hydrogen, whereby the surface of said insulating film is smoothed.

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Tokyo, Japan

Yoshikazu Hazuki