Kabushiki Kaisha Toshiba

Yoshihisa Fujii

Koichi Matsuno

Takeshi Sakaguchi

Shinichi Sotome

Tadayoshi Watanabe

Naoki Kai

Hirokazu Sugiyama

A semiconductor device including a first isolation region dividing a semiconductor substrate into first regions; memory cells each including a tunnel insulating film, a charge storing layer, an interelectrode insulating film, and a control gate electrode above the first region; a second isolation region dividing the substrate into second regions in a peripheral circuit region; and a peripheral circuit transistor including a gate insulating film and a gate electrode above the second region. The first isolation region includes a first trench, a first element isolation insulating film filled in a bottom portion of the first trench, and a first gap formed between the first element isolation insulating film and the interelectrode insulating film. The second isolation region includes a second trench and a second element isolation insulating film filled in the second trench. The first and the second element isolation insulating films have different properties.

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Yokkaichi, Japan

Yoshihisa Fujii