Sharp Kabushiki Kaisha Corporation

Yoshihisa Dotta

Kazuo Tamaki

Toshio Kimura

Yasuyuki Saza

Yasunobu Tagusa

Hirokazu Yoshida

Hajime Horinaka

Liumin Zou

Kiyoshi Inada

Tetsuyoshi Inoue

Hideyuki Kurimoto

Hideshi Makita

Kohichi Katohno

Akihiro Kawashima

Wires () electrically connecting solar cells () include first wires () and second wires (). The first wires () are connected to the first-conductivity-type electrodes () of a first one of the solar cells () and the second-conductivity-type electrodes () of a second one of the solar cellsthat is adjacent to the first one of the solar cells (). The second wires () are connected to the second-conductivity-type electrodes () of the first one of the solar cells () and the first-conductivity-type electrodes () of the second one of the solar cells (). The second wires () are electrically separated by holes () extending through both the second wires () and an insulating base member ().

Solar cell module, wiring sheet, and method of manufacturing wiring sheet

The semiconductor device of the present invention and the method of the present invention, for forming the semiconductor device, form: a penetrating hole in a semiconductor wafer which has a first insulating film and an electrode pad formed on a first face of the semiconductor wafer, the penetrating hole being immediately below the electrode pad; and a second insulating film on an inner wall of the penetrating hole and on a second face of the semiconductor wafer. In forming the second insulating film, electrodeposition using the semiconductor wafer as a cathode is used. After the second insulating film is formed, the first insulating film is etched using the second insulating film as a mask, the back face of the electrode pad is exposed, and a conductor layer, acting as a penetrating electrode, is formed in the penetrating hole.

Method of forming electrode for semiconductor device

A semiconductor device includes a second insulating film formed on a second surface of a semiconductor substrate whose first surface has been formed with a first insulating film and an electrode pad, and an opening is made in a portion of the second insulating film directly below the electrode pad. By using the second insulating film as a mask, a through hole is formed in the semiconductor substrate in such a manner that the through hole recedes from an opening edge of the first insulating film. A third insulating film is formed only on the inner wall of the through hole.

Semiconductor device and fabrication method thereof

A semiconductor package includes: a semiconductor chip having circuits formed on a surface, and having a thickness of 0.5 &#x3bc;m or more and 100 &#x3bc;m or less; and an adhesive resin layer provided so as to cover the surface of the semiconductor chip on which the circuits are provided.

Semiconductor package and a method for producing the same

A semiconductor device has multiple power-supply through electrodes, grounding through electrodes, and signal-routing through electrodes made through a semiconductor chip. The power-supply through electrodes, the grounding through electrodes, and the signal-routing through electrodes differ mutually in cross-sectional area. Hence, a semiconductor device and a chip-stack semiconductor device are provided which are capable of preventing the electrodes' resistance from developing excessive voltage drop, heat, delay, and loss, and also from varying from one electrode to the other.

Semiconductor device and chip-stack semiconductor device

A fabrication method of a semiconductor device according to the present invention includes the steps of: bonding a reinforcing plate with a front surface of a semiconductor wafer via a reinforcing plate, the reinforcing plate having holes and the semiconductor wafer bearing semiconductor devices; grinding a back surface of the semiconductor wafer; and detaching the reinforcing plate from the semiconductor wafer by injecting a solvent for dissolving an adhesive layer into the holes and by allowing the solvent to permeate through the adhesive layer. The method enables the reinforcing plate to be quickly detached from the semiconductor wafer without causing defects, such as bending and cracking, in the semiconductor wafer after the reinforcing plate is used to grind the semiconductor wafer.

Fabrication method of semiconductor device

A semiconductor device includes, a circuit constituting section having a function circuit and an externally-drawing electrode, connected to the function circuit, on a surface of the circuit constituting section. An insulating layer is provided on a side of a rear surface of the circuit constituting section. The insulating layer has a face opposite to the circuit constituting section, which has an area that is larger than an area of the rear surface of the circuit constituting section.

Semiconductor device and package product of the semiconductor device

A semiconductor device includes a circuit board on which a semiconductor chip is mounted via an adhesive resin layer and through which a moisture drain hole is formed. A pit part having a width wider than a diameter of the moisture drain hole is formed in a part of the adhesive resin layer exposed in the moisture drain hole. On this account, the semiconductor device can properly drain moisture to the outside when the semiconductor device is mounted on another packaging substrate by reflowing.

Semiconductor device and manufacturing method thereof

When a first semiconductor chip is installed on a circuit substrate by using an anisotropic conductive bonding agent, one portion thereof is allowed to protrude outside the first semiconductor chip. A second semiconductor chip is installed on the first semiconductor chip and a support portion formed by the protruding resin. The protruding portion of the second semiconductor chip is supported by the support portion from under. Thus, in a semiconductor device having a plurality of laminated semiconductor chips in an attempt to achieve a high density, even when, from a semiconductor chip stacked on a circuit substrate, one portion of a semiconductor chip stacked thereon protrudes, it is possible to carry out a better wire bonding process on electrodes formed on the protruding portion.

A semiconductor device package which eliminates the possibility of damages to a solder connected portion of a flip-chip connected chip by load, or which eliminates ultrasonic output at the time of wire bonding is described. Electrodes of a first chip are connected to first connection pads corresponding to the electrodes with the first chip being bonded at its rear surface to a rear surface of a second chip. A first resin is interposed in a gap between the first chip and a circuit board so as not to cover the first or second connection pads. Thereafter, the electrode of the second chip is connected to the second connection pads by wires, and the whole device is overlayed by a second resin.

Semiconductor device using a chip scale package

In a liquid crystal display apparatus, in order to reduce the size and weight, an integrated circuit for driving a liquid crystal is mounted on the glass substrate including the liquid crystal panel either directly or by way of a tape carrier. That is, two glass substrates of liquid crystal panel are mutually overlapped with an offset, and a liquid crystal material is injected into the overlapping regions of the two glass substrates, and liquid crystal display is effected in this region. Further, in the non-overlapping region of the two glass substrates, the integrated circuit is connected either directly or by way of a tape carrier. On the glass substrates, electrodes for varying the optical characteristics of the liquid crystals are provided, and the integrated circuit drives the liquid crystal by controlling the voltage applied to the electrodes. Further transparent insulation films are formed usually formed on the electrodes. The transparent insulation films are also formed in the non-overlapping region of the glass substrates. Since the transparent insulation films are finely patterned by photolithography, they may be selectively formed on the portions where defective insulation is likely to occur between the wiring conductors following the integrated circuit from the electrodes, or between the integrated circuit and the peripheral portion of the connecting part.

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Nara, Japan

Yoshihisa Dotta