Fujitsu Corporation

Spansion Llc.

Yoshihiro Tsukidate

Akira Takashima

Takao Nishimura

Kaname Ozawa

Yuji Akashi

Mitsutaka Ikeda

Katsuhito Kikuma

Kazuhiro Kurihara

Yasushi Kasa

Tsutomu Nakai

Tadashi Uno

Makoto Igarashi

Hiroshi Onodera

Fumihiko Ando

Hayato Okuda

Andy Cheung

Hiroshi Otani

A semiconductor device includes at least one reference cell (), a cascode circuit () that has at least two current mirror circuits (and) and outputs voltages dependent on a current flowing through the at least one reference cell () to at least two output paths (), and a switch () that selectively connects the at least two output paths () to a given output terminal ().

Semiconductor device and method of generating a reference voltage therefor

A memory circuit has a plurality of blocks which further comprises a plurality of regular sectors and a spare sector, wherein each sector further comprises a plurality of memory cells, and when a regular sector in a first block is defective, this defective regular sector is replaced with a spare sector in a second block. And responding to an address to be supplied, the regular sector corresponding to the supplied address in the first block and the spare selector in the second block are selected simultaneously during a first period, and after the first period, selection of one of the regular sector and the spare sector is maintained according to the result of redundancy judgment on whether the supply address matches with the redundant address. Regardless the result of redundancy judgment on whether the supplied address matches the redundant address indicating the defective sector, a regular sector in the first block and the spare sector in the second block, to be a pair thereof, are set to selected status simultaneously during the first period when access operation stars, so a drop in access speed due to a redundancy judgment operation can be suppressed.

Memory circuit with redundant configuration

In a stacked semiconductor device which has a plurality of semiconductor chips of desired sizes stacked as one package, a first semiconductor chip is mounted on a flexible printed wiring board provided with external connecting terminals. A printed circuit board is placed and mounted on the first semiconductor chip by flip-chip bonding. A second semiconductor chip is secured onto the printed circuit board. The second semiconductor chip is connected to the flexible printed wiring board by wire bonding. The first semiconductor chip is connected to the flexible printed wiring board by wire bonding via the printed circuit board.

Stacked semiconductor device and method of producing the same

This invention is nonvolatile memory that has an ordinary memory cell region wherein ordinary data is stored and an erase information storage memory region wherein the information that shows the status of the erase operation is stored. The erase information storage memory region comprises nonvolatile memory that can store the information even when the power is cut. Preferably, the erase information storage memory region can store erase information in the memory block units in which the erase operation is executed. Further preferably, the erase information storage memory region is able to store erase information for at least the three statuses that are involved in erase operations: erase operation start status, preprogramming end status, and erase operation complete status.

Non-volatile memory for storing erase operation information

Growing community of inventors

Kawasaki, Japan

Yoshihiro Tsukidate