Fujitsu Corporation

Yoshihiro Miyamoto

Yuichiro Ito

Kunihiro Tanikawa

Hisashi Yamaguchi

Hironori Nishino

Toshio Fujii

Yusuke Matsukura

Keizo Kurahashi

Masaji Dohi

Nobuyuki Kajihara

Isao Tofuku

Tomoyuki Unotoro

Kazuya Kubo

A solid-state imaging device comprises: a plurality of pixels including a light-sensitive portion () for photoelectrically converting incident light, a transfer gate () for transferring a charge stored in the light-sensitive portion, a resettable detection capacitor () for storing the charge transferred from the transfer gate, and a selection switch () for outputting a charge of the detection capacitor according to a selection signal RWn; a charge amplifier () for converting the detection capacitor charge, which is outputted from the pixels, to a voltage; and a correlated double sampling circuit () for obtaining a voltage difference between a reset level and a detected level converted by the charge amplifier. According to the above device, a thermal noise is eliminated due to the correlated double sampling circuit. Further, a fixed pattern noise is not generated due to the pixel circuit structure.

Solid-state imaging device with the elimination of thermal noise

A multi-quantum well infrared photo-detector, in which a plurality of multi-quantum well layers having respective sensitivities for different wavelength ranges of infrared are layered via a common contact layer. The infrared photo-detector includes a switch where one end is connected to the above common contact layer, and a current integration unit which is connected to the other end of the above switch. First and second voltages are applied to first and second contact layers at the opposite side of first and second multi-quantum well layer respectively. The above switch is conducted for a predetermined time so that either voltage between the above common contact layer and the first contact layer or voltage between the above common contact layer and the second contact layer becomes higher than the other, and the above current integration unit is charged or discharged by the current which flows in the above multi-quantum well layers.

Multi-quantum well infrared photo-detector

According to the present invention, various logic circuits, AD converters, DA converters and counter circuits can be constituted with a small number of transistors by employing a capacitive coupling circuit. An analog/digital converter comprises: an input terminal, for which analog input is provided; an output terminal of N (N is a plural number) bits, for which binary output is provided; and N unit circuits arranged in parallel, each including an input capacitor having one electrode connected to the input terminal, a first inverter connected to the other electrode of the input capacitor, and a second inverter connected to the first inverter, wherein outputs of the second inverters of the unit circuits are respectively provided for the output terminals, wherein inverted outputs of the outputs for the unit circuits are fed back via feedback capacitors to respective input terminals of the first inverters of the unit circuits corresponding to lower bits, and wherein a capacitance of the feedback capacitor, which corresponds to the inverted output of the M-th (M is an integer) unit circuit from the most significant bit, is &frac12;,times a capacitance of the input capacitor of the unit circuit that is fed back.

Analog to digital converter using remainder feedback loop

A/D converter with input capacitor, feedback capacitor, and two invertors

According to the present invention, various logic circuits, AD converters, DA converters and counter circuits can be constituted with a small number of transistors by employing a capacitive coupling circuit. An analog/digital converter comprises: an input terminal, for which analog input is provided; an output terminal of N (N is a plural number) bits, for which binary output is provided; and N unit circuits arranged in parallel, each including an input capacitor having one electrode connected to the input terminal, a first inverter connected to the other electrode of the input capacitor, and a second inverter connected to the first inverter, wherein outputs of the second inverters of the unit circuits are respectively provided for the output terminals, wherein inverted outputs of the outputs for the unit circuits are fed back via feedback capacitors to respective input terminals of the first inverters of the unit circuits corresponding to lower bits, and wherein a capacitance of the feedback capacitor, which corresponds to the inverted output of the M-th (M is an integer) unit circuit from the most significant bit, is 1/2.sup.M times a capacitance of the input capacitor of the unit circuit that is fed back.

Logic circuit utilizing capacitive coupling, an AD converter and a DA

A display signal of high contrast is generated by processing an image signal that is acquired from a camera such as an infra-red or X-ray camera. The method involves: dividing a screen into polygons, finding signal intensities of pixels in these polygons by interpolation from the original image signal intensities of pixels corresponding to the vertices of these polygons as a signal intensity LF of a low frequency component; finding the signal intensities HF of high frequency components of these pixels by performing calculation to subtract the signal LF of this low frequency component from the original image signal S at each pixel; finding, for the signal intensities HF of these high frequency components, from a histogram showing the rate of occurrence numbers of the respective signal intensities, a transformation function IHS including the integrated values of these rate of occurrence numbers up to respective signal intensities; transforming the signal intensities of the high frequency components HF into display signal intensities DHF in accordance with this transformation function IHS; and finding the display signal DP of these pixels by adding to the display signals DHF of these high frequency components obtained by this transformation a signal obtained by multiplying the signal of the low frequency component LF by a weighting coefficient .beta. of less than 1.

Image signal processing method and image signal processing device

A charge injection circuit for injecting a charge to a signal processing circuit has a photo-voltaic element for generating a photocurrent when an infrared light is received, a field effect transistor used for injecting the charge to the signal processing circuit, and an impedance conversion circuit for feeding back an output of the field effect transistor to a substrate potential of the photo-voltaic element. The impedance conversion circuit has a gain which is greater than zero and less than or equal to one.

Charge injection circuit having impedance conversion means

An image sensing device is improved by an optical shield having a multi-aperture to provide high signal to noise ratio. The improved optical shield is provided with a plurality of shield elements forming a grid-like or cellular structure. With such a structure, the solid angle of the field of view for each sensing element becomes almost the same, resulting in the reduction of 'shading'. The distance between the heat shield and the array can be reduced, resulting in miniaturization of the device. Each sensing element is not shielded individually, so the pitch of the shield elements can be larger than that of the sensing elements, which allows easier and less costly fabrication of the shield.

Optical shield for image sensing device

A new type flat panel display device has the structure combining a plurality of solid state display modules corresponding to character blocks. Each module is assembled using, as the basic element, a semiconductor substrate integrating circuit elements for driving and circuits for addressing, and moreover, it is provided with a memory element for a selection signal in view of making possible access to each module.

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Kawasaki, Japan

Yoshihiro Miyamoto