Kabushiki Kaisha Toshiba

Tokyo Shibaura Denki Kabushiki Kaisha

Yoshihiro Iwamoto

Tetsuya Iida

Hiroshi Shigehara

Fuminari Tanaka

In a case where a plurality of outputs are connected and used, even when a voltage higher than the power-supply voltages inside the integrated circuit is applied to the signal output terminal, the reliability of the internal elements is prevented from deteriorating. The semiconductor integrated circuit includes a PMOS transistor that has its source potentially isolated from its back gate and has one end of the current path between its source and drain connected via a transistor switch to the signal output terminal. The integrated circuit generates a control signal having a value proportional to the voltage at one end of the current path between the source and drain of the PMOS transistor, supplies the generated control signal to the gate of the PMOS transistor, and controls the voltage of the control signal so that the potential difference between one end of the current path between the source and drain and the gate of the PMOS transistor may be within a desired range of values when the PMOS transistor is set in the on state by the control signal.

Output circuit providing protection against external voltages in excess

To compensate for an offset of an A/D converter, a predetermined reference signal is supplied to the A/D converter. Based on the output signal of the A/D converter, the amount of the offset for this converter is acquired. A multiplexer outputs a compensation signal which serves to cancel out the acquired offset amount, the output of this multiplexer is subjected to analog addition to the analog input signal, and the offset of this A/D converter is compensated for at the input stage.

Successive approximation analog to digital converter

A liquid crystal display control device, in accordance with the present invention, for supplying a voltage signal to drive a liquid crystal display unit comprises a boosting circuit, and a segment signal circuit and/or a common signal circuit. The boosting circuit includes a dc power supply first capacitor connected between a plurality of first group switches and to be connected in parallel to said dc power supply when the first group switches are operated, a plurality of second group switches, second boosting capacitor connected between the other polarity of the dc power supply and one end of the other switch of the second group switches. One of the second group switches is connected between one polarity of the power supply and one end of the first capacitor. A third electronic switching means is connected to the boosting circuit in parallel to the second capacitor for discharging the voltage charged in the second capacitor. Therefore, a voltage signal having a predetermined amplitude and polarity for driving the LCD display unit is charged in the second capacitor when the first and second switches are selectively operated and it is discharged when a power interruption occurs.

Liquid crystal display control device

In the Schmitt trigger circuit, a common input signal is supplied to first and second wave-shaping circuits, which have different threshold voltages and which provide different output wave-shaped signals. These wave-shaped signals are alternately selected by a selection circuit to provide the composite Schmitt trigger output signal. When the logic level of the output signal of the selected wave-shaping circuit is inverted due to a change in the input signal to that selected wave-shaping circuit, the output of the other wave-shaping circuit is selected by the selection circuit to provide the Schmitt trigger output signal.

Schmitt trigger circuit with selection circuit

A dynamic read only memory comprises a plurality of ROM blocks and a control circuit composed of a plurality of MOSFETs respectively connected to the column lines. The control circuit keeps the data from the ROM block not containing a specified memory cell at a discharged level.

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Kawasaki, Japan

Yoshihiro Iwamoto