Citizen Watch Company, Ltd.

Yoshihiro Ishida

Shingo Ichikawa

Yoshihiro Shimada

Isao Yabe

Seiichi Mimura

Katsuji Komatsu

Kikuo Takenouchi

Kiyoshi Shimizu

Atsushi Omura

Yoshio Iinuma

Tsutomu Ohara

Shuichi Ishiwata

Kazuhiko Terashima

Takeshi Toyoda

Tetsuo Sato

Ienobu Ikeda

Taichi Miyazaki

Yoshinobu Ohmori

Tetsuo Satou

Shinichi Nishikata

Semiconductor packages which are prepared by forming circuit substrates, mounting IC chips on the circuit substrates, encapsulating the IC chips on the circuit substrates with resin, and forming electrodes, are attached to a standard member. After this attaching step, the semiconductor packages are subjected to a cutting step where the semiconductor packages are diced into a plurality of circuit substrates.

Process for manufacturing semiconductor package and circuit board assembly

The contours of openings of a solder resist defining exposed portions of electrode pads and the contours of openings of the solder resist defining the contours of register or patterns are simultaneously formed by photolithography using the same mask pattern. As a result, the patterns for registration can be easily formed on a main board or circuit boards. Also, it is possible to increase the positional accuracy of the register or patterns relative to the positions of the electrode pads.

Electronic component device, and main board for circuit boards

The shapes of openings of a solder resist defining exposed portions of electrode pads and the shapes of openings of the solder resist defining the shapes of positioning signs are simultaneously formed by photolithography using the same mask pattern. As a result, the signs for registration can be easily formed on a main board or circuit boards. Also, it is possible to increase the positional accuracy of the signs relative to the positions of the electrode pads.

Method for manufacture electronic component device

An IC chip is mounted on a circuit substrate by the flip chip mounting. A projection is provided for forming an eccentric space between the IC chip and the circuit substrate at a position deviated from a center of the IC chip. A sealing resin is injected in a space between the IC chip and the circuit substrate.

Integrated circuit package

An organic resin film,having an opening on an electrode pad is formed on a main surface of an IC chip,and a protruding electrode,formed on the electrode pad is formed of a low melting point eutectic solder. As a result, the protruding electrode,is formed without melting the organic resin film while preventing a crack from being generated by a stress applied between the electrode pad and the IC chip. Thus, the reliability of a semiconductor package can be enhanced.

Semiconductor package

Method for forming bump of semiconductor device

Semiconductor device

A resin encapsulated pin grid array includes an IC chip mounted on a resin substrate having a plurality of contact pins on its lower surface and resin-encapsulated by injection molding. A metal heat radiating member is integrally formed on the upper surface of the encapsulating resin when the encapsulating resin is injection-molded.

Resin encapsulated semiconductor device

Resin encapsulated pin grid array and method of manufacturing the same

A method of making a resin encapsulated pin grid array includes an IC chip mounted on a resin substrate having a plurality of contact pins on its lower surface and resin-encapsulated by injection molding. A metal heat radiating member is integrally formed on the upper surface of the encapsulating resin when the encapsulating resin is injection-molded.

Method of making a resin encapsulated pin grid array with integral

A method of making a resin encapsulated pin grid array which includes an IC chip mounted on a resin substrate having a plurality of contact pins on its lower surface and resin-encapsulated by injection molding. A metal heat radiating member is integrally formed on the upper surface of the encapsulating resin when the encapsulating resin is injection-molded.

A device for packaging many memory IC chips having a plurality of common connecting terminals on a main circuit board. A plurality of IC chips are packaged on an auxiliary board to make an IC chip unit, and a plurality of IC chip units are aligned on the main circuit board. The connections between unit-connecting terminals provided on the respective IC chip units and the main circuit board are made by means of wiring patterns on the main circuit board.

IC package

An IC-packaged device comprises a lower plate which has wiring patterns at least on an upper surface; an upper plate which has upper surface wiring patterns and at least an opening hole and are superimposed on the lower plate when used; and a plurality of IC chips which has a lot of connecting terminal groups mounted on the upper plate. In this structure, some of the connecting terminal groups of the plurality of IC chips are wire-bonded to the wiring patterns on the upper plate, while the other of the connecting terminal groups of the plurality of IC chips pass through the opening hole in the upper plate and are wire-bonded directly to the wiring patterns on the lower plate.

Growing community of inventors

Tanashi, Japan

Yoshihiro Ishida