Fujitsu Corporation

Yoshihiko Takeda

Kentarou Yuasa

Shigeyoshi Ohara

When a plurality of data blocks are divided into a plurality of frames and the divided frames are transmitted, every time a frame is received, a interim calculation result of a check code is updated using a transitional calculation result of the check code of the data block corresponding to the frame received and the data included in the frame. When a final calculation result of the check code of a data block is obtained, the calculation result is compared with the check code included in the data block.

Apparatus and method for judging the legitimacy of transfer data

A bus connection circuit is connected by a bus to a bridge circuit having a plurality of pre-fetch buffers to access memory. A plurality of request queues and a plurality of request signal outputs and grant signal inputs are provided in a single bus connection device. By means of the single bus connection device, a plurality of pre-fetch buffers of a bridge circuit can be utilized effectively, wasted read requests corresponding to retry responses from the bridge circuit can be decreased, and consequently wasted use of a PCI bus can be reduced.

Bus connection circuit and bus connection system having plural request queues, a bus interface portion outputting request signals, an arbiter performing arbitration of plural requests and a bus interface portion outputting a request signal indicating allocation of pre-fetch buffers corresponding to arbitrated requests

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Kawasaki, Japan

Yoshihiko Takeda