Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Yoshifumi Nakamura

Nozomi Shimoishizaka

Yoshihiro Bessho

Minehiro Itagaki

Ryuichi Sahara

Satoru Yuhaku

Kazumi Watase

Kazuhiro Miura

Yasuhiko Hakotani

Takahiro Kumakawa

Kazuyuki Kaino

Keiji Miki

Hiroaki Takezawa

Kouichi Nagao

Hiroaki Fujimoto

Tsukasa Shiraishi

Hiroyuki Imamura

Yutaka Harada

Takayuki Tanaka

Yasutake Yaguchi

Michinari Tetani

Nobuyuki Koutani

Akihiko Miyoshi

Shinji Murakami

Kazuyuki Kainou

Seiichi Nakatani

Yoshihiro Tomura

Nobuhiro Hase

Yukihiro Kozaka

Michiharu Torii

Kenshi Tokushima

Tsuneharu Katada

A semiconductor device including a semiconductor elementhaving an active element region, a plurality of element electrodesformed on a principal face of the semiconductor element, external terminalsandconnected to one or more element electrodes via connection membersand, one or more first heat-dissipation protrusionsformed on the principal face of the semiconductor element, an insulation resin layercovering the principal face of the semiconductor element and the first heat-dissipation protrusions, and a heat-dissipation mediumcontacting a face of the insulation resin layer on a side opposite to a side contacting front faces of the first heat-dissipation protrusions. At least a part of the active element region is included in a region below a bottom face of the first heat-dissipation protrusion, the first heat-dissipation protrusion is not connected to the external terminal within the active element region, a thermal conductivity of the first heat-dissipation protrusion is larger than a thermal conductivity of the insulation resin layer, and a thickness of the insulation resin layer from the front face of the first heat-dissipation protrusion to the heat-dissipation medium is thinner than a thickness of the insulation resin layer from the principal face of the semiconductor element to the heat-dissipation medium. Thereby, it is possible to improve the speed of dissipating heat from the active element region of the mounted semiconductor element to the heat-dissipation medium.

Wiring board, semiconductor device and method for manufacturing the same

A semiconductor device of the present invention includes: a wiring boardin which a conductive wiringis formed on an insulating substratehaving an opening; a semiconductor elementthat has a circuit forming regionand an electrode pad, and is mounted on the wiring board with the circuit forming region facing the opening, the electrode pad being connected electrically to the conductive wiring via a protruding electrode; a sealing resinthat covers the connected portion between the electrode pad and the conductive wiring; a heat dissipating memberthat is disposed so as to have a portion facing the opening; and a filling materialthat has a heat conductivity higher than that of the sealing resin, and is filled into the opening, so as to be in contact with the circuit forming region of the semiconductor element and the heat dissipating member. Even when the wiring board has a small area, heat dissipation efficiency can be ensured, and low cost manufacture can be achieved.

Semiconductor device, method for manufacturing the same, and semiconductor device mounting structure

A wiring board includes an insulating base; an adhesive layer formed on the surface of the insulating base; a conductor wiring formed on the surface of the adhesive layer; and a bump formed crossing the longitudinal direction of the conductor wiring over regions on the adhesive layer on both sides of the conductor wiring, wherein the back face at a part of the conductor wiring where the bump is formed, and the back faces and parts of the side faces of the bump formed above the regions of the adhesive layer on both sides of the conductor wiring, are embedded in the surface of the adhesive layer so as to be adhered to the adhesive layer. Even when the wiring width of the conductor wiring is decreased, the conductor wiring can be adhered to the wiring board firmly.

Wiring board and method for manufacturing the same, and semiconductor device

A semiconductor device is configured such that an electrode pad connected to an internal circuit is formed on a surface of a semiconductor substrate, wires are formed near and around the electrode pad, a protective film is formed which covers the edge of the electrode pad, the wires, and the surface of the semiconductor substrate, and a metal bump is formed on the electrode pad such that the edge of the electrode is disposed on the protective film on the wires. According to this configuration, since the wires are formed near the electrode pad, the protective film covering the edge of the electrode pad and an area around the edge is formed relatively flat, and the metal bump has a flat surface on a convex portion formed on the relatively flat protective film. Therefore, even when the electrode pad is small, a flat area can be sufficiently obtained on the surface of the metal bump, thereby obtaining stable connection via an anisotropic conductive sheet or the like by COG.

Semiconductor device and method of manufacturing the same

A wiring board includes: an insulating substrate; a plurality of conductive wirings provided on the insulating substrate so as to be aligned with a semiconductor mounting region where a semiconductor chip is to be mounted; and bump electrodes provided on the respective conductive wirings. The bump electrodes include a first bump electrode for mounting the semiconductor chip and a second bump electrode for adjusting a height of the first bump electrode. The second bump electrode is provided at a region of at least one of the plurality of conductive wirings other than the semiconductor mounting region.

Wiring board, semiconductor device using the same, and method for manufacturing wiring board

A wiring board includes first and second feeding electrodes () provided along both sides of an insulating substrate (), feeding bus lines () extending in a traverse direction and connected to both the feeding electrodes, and conductor wirings () having one side terminals forming inner leads having protruding electrodes () and the other side terminals connected to the feeding bus lines. The inner leads in each unit region are arranged in two lines extending in the traverse direction. The inner leads of a first group are arranged with a dense wiring pitch, and the inner leads of a second group include a dense pitch region in which a wiring pitch is the same as that of the inner leads of the first group, and a sparse pitch region in which a wiring pitch is longer than that of the inner leads of the first group. The inner leads () of the first group and the inner leads () in the dense pitch region of the second group are connected to the feeding bus line on one side of each region, and the inner leads () in the sparse pitch region of the second group are connected to the feeding bus line on the other side of each unit region. Non-uniformity of heights of the protruding electrodes due to a difference in the wiring pitches of the inner leads can be suppressed easily.

Wiring board and method for producing the same

A circuit board including a flexible insulating substrate, a plurality of conductive wirings placed in line on the flexible insulating substrate, and bumps provided at end portions of the respective conductive wirings positioned in a region for mounting a semiconductor chip is provided. The circuit board further includes an auxiliary conductive wiring positioned at an outermost corner of the region for mounting the semiconductor chip, being adjacent to and an outside the outermost conductive wiring, and an auxiliary bump formed on the auxiliary conductive wiring in line with the bumps on the conductive wirings. One end portion of the auxiliary conductive wiring is terminated at a position in the outside vicinity of the auxiliary bump in an outward direction of the region for mounting the semiconductor chip, and the auxiliary conductive wiring is bent at the other end portion positioned inside the auxiliary bump in an inward direction of the region for mounting the semiconductor chip, and connected to an end of the adjacent outermost conductive wiring. A break in the outermost conductive wiring, which is caused by concentrated stress at the time of joining the bumps of the circuit board and electrode pads of the semiconductor chip, can be suppressed.

Circuit board with auxiliary wiring configuration to suppress breakage during bonding process

A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.

Method for fabricating a chip-scale-packaging (CSP) having an inductor

A wiring board includes: a flexible insulating base; a plurality of conductive wiringsarranged on the flexible insulating base; protruding electrodesprovided respectively at an end portion of the same side of each of the conductive wirings; external terminalsformed respectively at the other end portions of each of the conductive wirings; metal plating layers applied on the conductive wirings, the protruding electrodes and the external terminals; and solder resist layersformed respectively by coating the conductive wirings in regions between the end portions at which the protruding electrodes are provided and the external terminals. In the regions where the solder resist layers are formed, no metal plating layers are formed on the conductive wirings, and the surfaces of the conductive wirings to be contacted with the flexible insulating base are rougher than the surfaces not to be contacted with the flexible insulating base. Even when a film base is thin, bending stress applied to the conductive wirings is relieved sufficiently, and thus breaks in the wirings are suppressed.

Wiring board, semiconductor device and display module

The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Semiconductor device including a diffusion layer

Disclosed is a semiconductor devicecomprising a first semiconductor elementwith an arrangement of first element electrodes, a second semiconductor elementwith an arrangement of second element electrodes, a connection memberelectrically connecting together a portionof the first element electrodesand the second element electrodes, an insulation layercovering a major surfaceof the first semiconductor elementand a backside surfaceof the second semiconductor element, a wiring layerformed on the insulation layerand electrically connected to the first element electrode portionexposed in an opening portion, and an external electrodeformed, as a portion of the wiring layer, on the insulation layer

Semiconductor device and method for the fabrication thereof

Semiconductor device having an inductor formed on a region of an insulating film

A low elasticity layer ( ) having an opening in an electrode arranging area where element electrodes are disposed is provided on a main surface of a semiconductor substrate ( ). On the low elasticity layer ( ), lands ( ) serving as external electrodes are disposed, and pads ( ) on the element electrodes, the lands ( ) and metal wires ( ) for connecting them are integrally formed as a metal wiring pattern ( ). A solder resist film ( ) having an opening for exposing a part of each land ( ) is formed, and a metal ball ( ) is provided on the land ( ) in the opening. The low elasticity layer ( ) absorbs thermal stress and the like caused in heating or cooling the semiconductor device, so as to prevent disconnection of the metal wires ( ).

Semiconductor device and method for manufacturing the same

Semiconductor device including a diffusion layer formed between electrode portions

A method for producing a printed-circuit board includes forming via holes that penetrate through a prepreg to whose surface a parting film is applied; filling the via holes with a conducting paste; compressing the prepreg under heat to cure the prepreg and the paste; and then peeling off the parting film. Thus, projection electrodes with a height corresponding to the thickness of the film are formed in a manner such that the projection electrodes are integrated with the via hole conductors.

Growing community of inventors

Osaka, Japan

Yoshifumi Nakamura