Panasonic Corporation

Socionext Inc.

Yoshifumi Hosokawa

Noriaki Saito

Katsuaki Abe

Kentaro Miyano

Yasuyuki Naito

Yoshito Shimizu

Michiaki Matsuo

Akihiko Matsuoka

Kiyomichi Araki

Junji Sato

Tadashi Morita

Ippei Kanno

Atsushi Maruyama

Yohei Morishita

Masahiro Kumagawa

Satoshi Tsukamoto

Atsushi Ohara

George Hayashi

Isao Imazeki

Yoichi Nagaso

Yoshihiro Okumura

Disclosed herein is a frequency modulated continuous wave (FMCW) radar. The FMCW radar includes: a transmission signal generator that generates a frequency-modulated transmission signal; a transmission signal sender that sends the transmission signal; a receiver that receives a reflected wave of the transmission signal; an adjuster that adjusts the amplitude and phase of a cancel signal, which cancels a leakage signal component in a received signal, in accordance with a variation in the frequency of the transmission signal; and a superimposer that superimposes the cancel signal over the received signal to cancel the leakage signal component.

FMCW radar

A diversity reception circuit obtains a synthesized output based on signals received at a plurality of antennas. The diversity reception circuit includes a plurality of PLLs outputting respective local oscillation signals; a plurality of mixers converting respective received radio frequency signals to low frequency signals; and a switch circuit selecting any one of outputs of the PLLs and supplying the selected output to at least one of the mixers.

Diversity reception circuit

A diversity receiver includes a local oscillation (LO) signal generator that generates LO signals, each having a phase different from one other; a first frequency converter that includes a first switching mixer controlled by at least one of the LO signals and converts a frequency of a first input signal to generate a first output signal by combining the first input signal with the LO signals; a second frequency converter that includes logic circuits, each of which delivers a corresponding LO signal, and a second switching mixer controlled by an output of the logic circuits, and converts a frequency of a second input signal to generate a second output signal by combining the second input signal with the LO signals, each output of the logic circuits being activated or deactivated in accordance with a corresponding phase control signal; and a combiner that combines the first output signal from the first frequency converter and an output signal and the second signal from the second frequency converter.

Diversity receiver

A received is disclosed that is capable of improving reception sensitivity while avoiding an increase in circuit scale. The receiver includes: a multi-phase local oscillation signal generating section that generates a plurality of local oscillation signals of different phases; a phase selection signal generating section that generates a phase selection signal used to select a baseband signal of a predetermined phase based on a detection result of a reception level of a high-frequency signal; and a frequency converter that frequency-converts the high-frequency signal based on the plurality of local oscillation signals, that generates a plurality of baseband signals of different phases, and that selects a baseband signal from among the plurality of baseband signals based on the phase selection signal.

Receiver

A sampling filter device wherein the filter characteristic is variable without using a control signal of a complicated waveform is provided. A sampling filter devicehas integration capacitorsand, an integration time adjustment section, and a plurality of switches, and. Input current is integrated in different time duration with one clock and is stored in the integration capacitorsandand charges stored in the integration capacitor from several clocks before to one clock before are added and the result is output. When charge is stored in the integration capacitorsandwith each clock, the integration time duration is changed, whereby it is made possible to weight and add output charge and the filter characteristic changes.

Sampling filter device

In a receiver circuit, an analog signal processor frequency-converts an input high frequency signal into a baseband signal, and performs low pass filtering at a cutoff frequency below a desired-wave band. An ADC converts an output of the analog signal processor into a digital signal. A digital signal processor compensates an output of the ADC for a signal component in the desired-wave band which has been attenuated by the filtering operation of the analog signal processor.

Receiver circuit and receiver apparatus including the same

Provided are a direct sampling circuit and a receiver using a discrete time analog process and having a filter effect of a steep attenuation characteristic in a narrow-pass band without lowering a sampling rate. In a discrete time direct sampling circuit (), the positive phase side and the inverse phase side are both sampled by a local signal for a differential current output of a differential voltage/current conversion unit () and electric charge is accumulated in a charge sampling capacitor. The latest accumulated charge at the positive phase side and charge accumulated at the inverse phase side before a predetermined number of samples are combined with the charge accumulated in a history capacitor () in the past. Thus, it is possible to realize equivalently high-degree FIR filter characteristic.

Discrete time direct sampling circuit and receiver

There are provided a sampling filter that enables a filter characteristic to be adjusted flexibly, and a radio communication apparatus equipped with this sampling filter. A sampling filter apparatus () is equipped with four integration units (-through-) corresponding to the number of filter taps, and some of the integration units (-through-) include an integrator having an MEMS structure. By this means, a charge amount (accumulated charge amount) of a received signal integrated by an integrator can be adjusted by adjusting the capacity of an integrator having an MEMS structure. A received signal amount emitted from an integration unit can also be adjusted by adjustment of the integration amount of a received signal, enabling the filter characteristic of the sampling filter apparatus () to be adjusted flexibly.

Sampling filter and radio communication apparatus

There are provided a sampling mixer, quadrature demodulator, and a wireless device capable of suppressing receiving sensitivity degradation caused by alias components or second-order distortion components. In the sampling mixer (), a sampling switch () and another sampling switch () sample a reception signal based on a local signal with a predetermined frequency. A control signal generator () generates a control signal for controlling a filter operation. An in-phase mixer () and a reverse-phase mixer () perform, based on the control signal, filter processing on the sample signal obtained by the sampling switch (). A delay controller () controls the phase difference between the local signal and the control signal according to a reception-desired frequency.

Sampling mixer, quadrature demodulator, and wireless device

A direct sampling circuit and a receiver which carry out discrete time analog processing with a high degree of design freedom and are provided with a filter property which is achievable to comply with the receipt of a broad band signal. A plurality of discrete time analog processing circuits () are connected in parallel with each other, a gm value and a capacitance of a capacitor in each circuit system are set independently based on a prescribed condition, and an output signal obtained from each circuit system is synthesized by means of a buffer capacitor (), so that an equivalently high-dimensional IIR filter can be put into practice.

A sampling mixer includes TAs (transconductance amplifiers), an in-phase mixer section connected to the TA and the TA, an opposite-phase mixer section connected in parallel with the in-phase mixer section, and a signal generator for generating a control signal for the in-phase mixer section and the opposite-phase mixer section respectively. The IIR filter using signals that underwent a current conversion by using the different transconductances is constructed, so that the filter characteristic can be designed by a weighting of the transconductance in addition to a capacitance ratio. As a result, the wide-band filter characteristic and the band-pass filter characteristic can be obtained, and deterioration of the receiving sensitivity can be suppressed by designing the filter characteristic suitable for the radio communication system.

Sampling mixer, filter device, and radio device

A sampling filter of such circuitry as not requiring a high frequency REF signal even if the number of decimation is decreased. In the sampling filter, the rotate capacitor in each switched capacitor circuit including Cr (-) arranged in four parallel arrays operates in four phases of integration, discharge, reset and feedback different from each other at the same timing. Consequently, a control signal for driving the switched capacitor circuit is used commonly. As a result, the circuit scale of a DCU () is reduced and the frequency of the REF signal can be lowered to the frequency of an LO signal even in operation without decimation.

Discrete filter, sampling mixer and wireless device

When a power supply switch is turned on and an RF signal and an LO signal are input to a bipolar transistor, a mixed signal of both signals is output as an IF signal. When the power supply switch is turned off, the bipolar transistor operates as two diodes connected between a base terminal and an emitter terminal and between the base terminal and a collector terminal. When the IF signal and the LO signal are input, the input signals are mixed with each other by the diodes and the RF signal is output. Accordingly, one frequency conversion is performed by the use of one frequency converter, an external circuit such as a signal path switching switch is not necessary.

Bidirectional frequency converter and radio equipment using same

The sampling filter apparatusincludes the first sampling switch, the second sampling switch, the first integratorfor integrating the charge input from the first sampling switch, the second integratorfor integrating the charge input from the second sampling switch, a plurality of integrators connected to both of the first integrator and the second integrator via a charging switch, respectively, the control section, a plurality of charging switches, and a plurality of discharge switches. A charge input from the sampling switch, a charge accumulated in the capacitorand a charge accumulated in a capacitorare shared by the capacitor, the capacitorand the capacitor, and the charge accumulated in the capacitoris output.

Sampling filter apparatus

The present invention has an object to provide a sampling filter apparatus and a wireless communication apparatus, which are capable of changing a filter characteristic without employing complex waveforms as control signals, and also, capable of performing filtering process operations without performing a decimation, while utilizing a wide frequency space. A sampling filter apparatusincludes a controller, a plurality of integratorsto, a plurality of switchestototo, and a plurality of voltage/current convertersto. An inputted current is stored in four pieces of integrators selected among the plurality of integratorstoby one clock, and electric charges which have been stored from four preceding clocks up to one preceding clock are added to each other so as to output the added electric charges from the remaining one integrator. When electric charges are stored in the integratorstoin each clock, since the inputted current is switched, the electric charges to be outputted can be weighted, and thus, a filter characteristic is changed.

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Osaka, Japan

Yoshifumi Hosokawa