Denso Corporation

Kabushiki Kaisha Toyota Chuo Kenkyusho

Yoshie Ohira

Yasuaki Makino

Norikazu Ohta

Hirofumi Funabashi

Takashi Katsumata

Hiromi Ariyoshi

Kentaro Mizuno

Shoji Hashimoto

Rie Taguchi

Kouhei Yamaguchi

A force detection apparatus includes a substrate and a force transmission block. The substrate includes: a high-sensitive mesa gauge that is provided on a main surface, extends in a first direction to produce a relatively large change of an electric resistance in accordance with compressive stress, and includes a top surface; a low-sensitive mesa gauge that is provided on the main surface, extends in a second direction to produce a relatively small change of an electric resistance, and includes a top surface; and a mesa lead that is provided on the main surface, extends in a third direction, and includes a top surface. The force transmission block contacts the top surface of the high-sensitive mesa gauge and the top surface of the low-sensitive mesa gauge, and is non-contact with at least a part of the top surface of the mesa lead.

Force detection apparatus having high sensor sensitivity

1to npairs of transistors (n=an odd number) are connected in parallel, and each pair of transistors has an upper transistor and a lower transistor connected in series. A point between the upper transistor and the lower transistor of a preceding pair of transistors is connected to a gate of the lower transistor of a subsequent transistor, and the point between the upper transistor and the lower transistor of npair of transistors is connected to the gate of the first lower transistor. A capacitor is inserted between the lower transistor and a direct power source. A current regulating circuit connected to gates of the upper transistors, wherein the current regulating circuit supplies a gate voltage to each gate of the each upper transistor. The magnitude of the gate voltage is adjusted such that a magnitude of current that flows between the source and drain of the upper transistor due to the gate voltage is proportional to a voltage between the source and gate of the corresponding lower transistor when the lower transistor is turned on.

Clock signal output circuit

A reference voltage circuit includes an operational amplifier, a first fixed resistance resistor, a second fixed resistance resistor, a third fixed resistance resistor, a first diode and a second diode. The reference voltage circuit further includes a fourth fixed resistance resistor having an end connected to a non-inverting input terminal of the operational amplifier and the other end connected to the first diode. The reference voltage circuit is characterized by a value of the resistance of the fourth resistor being less than the resistance of the first resistor and a temperature coefficient of the fourth resistor being greater than any of the temperature coefficients of the first, second and third resistors.

Circuit for outputting stable reference voltage against variation of background temperature or variation of voltage of power source

Growing community of inventors

Nagoya, Japan

Yoshie Ohira