Hitachi Displays, Ltd.

Panasonic Liquid Crystal Display Co., Ltd.

Hitachi, Ltd.

Japan Display Inc.

Yoshiaki Toyota

Takeshi Sato

Mutsuko Hatano

Mieko Matsumura

Tetsufumi Kawamura

Shinya Yamaguchi

Kyoko Kojima

Takeshi Ishida

Hajime Akimoto

Toshihiko Itoga

Toshio Miyazawa

Shinichiro Oka

Isao Suzumura

Takeo Shiba

Takuo Kaitoh

Masatoshi Wakagi

Hisashi Ikeda

Naohiro Furukawa

Takahiro Odaka

Yo Takeuchi

Provided is an automatic conveying technique capable of reducing load on a management system and promptly formulating and reviewing an operation plan. One preferred aspect of the invention includes: a plurality of conveying vehicles including a first conveying vehicle and a second conveying vehicle; and a management system configured to control the plurality of conveying vehicles. The management system is configured to formulate, for the plurality of conveying vehicles, an operation plan to be executed in a plurality of conveying operations collectively performed by the plurality of conveying vehicles. The management system is configured to determine by calculation that the first conveying vehicle is to perform a first conveying operation among the plurality of conveying operations, notify the other conveying vehicles including the second conveying vehicle of the first conveying operation, and cause the first conveying vehicle to perform the first conveying operation. The management system is configured to determine by calculation a second conveying operation to be performed by the second conveying vehicle among conveying operations that are not to be performed by the other conveying vehicles including the first conveying vehicle among the plurality of conveying operations, notify the other conveying vehicles of the second conveying operation, and cause the second conveying vehicle to perform the second conveying operation. The second conveying operation is calculated such that the plurality of conveying operations collectively performed by the plurality of conveying vehicles have a higher conveying efficiency.

Automatic article conveying system and automatic article conveying method

A display device for improving an aperture ratio of the pixel is provided. In the display device, a transparent oxide layer, an insulating film, and a conductive layer are sequentially stacked on a pixel region on a substrate, the conductive layer has a gate electrode of a thin film transistor connected to a gate signal line, and a region of the transparent oxide layer other than at least a channel region portion directly below the gate electrode is converted into an electrically conductive region, and a source signal line, a source region portion of the thin film transistor connected to the source signal line, a pixel electrode, and a drain region portion of the thin film transistor connected to the pixel electrode are formed from the conductive region.

Display device

An image display unit is provided for which it is possible to reduce the number of ion plantation and photolithographic processes required to manufacture the device. A gate electrode GT is a laminated structure of a thin bottom layer metal film GMB and a top layer metal film GMT. A top electrode of a storage capacitor Cst is formed of the bottom layer metal film GMB and ion implantation for the top electrode is performed at the same time as the ion implantation of source-drain electrodes. The gate electrode of a PMOSTFT of the device is also formed with the bottom layer metal GMB, and the ion implantation for threshold adjustment is performed by using the same resist.

Image display unit

Provided is an image display device including thin film transistors on a substrate, including: gate lines and drain lines intersecting the gate lines, each thin film transistor having, in a channel region, a laminate structure in which a gate electrode, a gate insulating film, and a semiconductor layer are laminated in the stated order from the substrate side; and a pair of removal regions in which parts of the gate insulating film are removed, which are formed on both sides of the gate electrode and formed in a channel width direction of the channel region, in which when W represents a width of the gate electrode in the channel width direction of the channel region, and R represents a width of the gate insulating film in the channel width direction, which is sandwiched between the pair of removal regions, R&#x2267;W is satisfied.

Image display device and manufacturing method thereof

A liquid crystal display device includes a first substrate and a second substrate. The first substrate includes a sheet-like first electrode formed of a transparent conductive film, a first insulator formed to cover the sheet-like first electrode, a plurality of linear second electrodes formed by a transparent conductive film on the first insulator so as to overlap the sheet-like first electrode, and a second insulator formed on the first insulator so as to cover the plurality of linear second electrodes. The first substrate and the second substrate interpose liquid crystal therebetween and are arranged to be opposed to each other. The sheet-like first electrode, the first insulator, and the plurality of linear second electrodes are provided in a pixel region on a surface of the first substrate of a side of the liquid crystal. The second insulator is made of the same material as the first insulator.

Liquid crystal display device

A display device includes a plurality of thin-film transistors formed on a substrate on which a display area is formed. The display device also includes a gate electrode, a gate insulating film formed so as to cover the gate electrode, an semiconductor layer in an island shape formed on an upper surface of the gate insulating film so as to superimpose the gate electrode without protruding from the gate electrode when viewed planarly, an insulating film formed so as to cover the semiconductor layer, and a pair of electrodes electrically connected to the semiconductor layer respectively through a pair of through holes that are formed at the insulating film. The semiconductor layer is formed by sequentially laminating a crystalline semiconductor layer and an amorphous semiconductor layer. The pair of electrodes is respectively formed by sequentially laminating a semiconductor layer doped with impurities and a metal layer.

A bottom gate-type thin film transistor includes a gate insulating film, an interlayer insulating film formed on the gate insulating film, having an opening which is formed in a formation region of a gate electrode, and a semiconductor film formed on the interlayer insulating film so as to cover the opening. The interlayer insulating film contains nitrides in an amount larger than that in the gate insulating film, and the semiconductor film includes a microcrystalline semiconductor film or a polycrystalline semiconductor film formed on semiconductor crystalline nuclei which are formed on the gate insulating film and the interlayer insulating film and contain at least Ge.

Thin film transistor and manufacturing method thereof

A display device includes a plurality of thin-film transistors formed on a substrate on which a display area is formed. At least one of the plurality of thin-film transistors includes a gate electrode, agate insulating film formed to cover the gate electrode, an interlayer insulating film formed on an upper surface of the gate insulating film and having an opening formed in an area where the gate electrode is formed in plan view, a pair of heavily-doped semiconductor films arranged on an upper surface of the interlayer insulating film with the opening interposed therebetween, a polycrystalline semiconductor film formed across the opening and formed in the area, the polycrystalline semiconductor film being electrically connected to the pair of heavily-doped semiconductor films, and a pair of electrodes formed to overlap the pair of heavily-doped semiconductor films, respectively, without overlapping the polycrystalline semiconductor film.

Provided is a display device including a thin-film transistor and a capacitor element, the thin-film transistor includes: a first insulating film (IN) which is formed to cover an area where a gate electrode (GT) is formed; a second insulating film (IN) which is formed on the first insulating film, the second insulating film having an opening (OP) formed in the area in plan view; a semiconductor layer (SCLt) which is formed on the second insulating film to cross the opening, the semiconductor layer including high concentration areas (CN); a third insulating film (IN) which is formed on the semiconductor layer to expose apart of each of the high concentration areas; and a pair of electrodes (DT, ST) each having electrical connection to the part; and the capacitor element includes a dielectric film which is formed of the same layer and the same material as the third insulating film.

Display device and manufacturing method thereof

The display device having a thin film transistor formed on a substrate including a display portion is provided. The thin film transistor including: a gate electrode; a gate insulating film formed so as to cover the gate electrode; a semiconductor laminated film formed on top the gate insulating film so as to extend over the gate electrode, the semiconductor laminated film being formed by laminating at least a polycrystalline semiconductor film and an amorphous semiconductor film, a first electrode and a second electrode disposed on top of the semiconductor laminated film so as to be opposed to each other across a region superposing the gate electrode. In the display device, the semiconductor laminated film is formed immediately below a wiring extending from the first electrode and immediately below a wiring extending from the second electrode.

Display device and method of manufacturing the same

One of the pixel electrode and the counter electrode includes, on a protective film formed so as to cover the thin film transistor, a planar metal electrode formed so as to cover a rough surface formed in the reflective pixel part; and a planar transparent electrode formed in the reflective pixel part and the transparent pixel part so as to cover the metal electrode. Another one of the pixel electrode and the counter electrode includes, on an insulating film formed so as to cover the one of the pixel electrode and the counter electrode, a plurality of linear electrodes provided in parallel with one another so as to overlap the one of the pixel electrode and the counter electrode. The transparent electrode included in the one of the pixel electrode and the counter electrode is formed of a transparent conductive film which is formed through application.

A method for manufacturing a TFT substrate in which a channel length can be stably formed while the number of masks is reduced. The method includes processing a gate of the n-type TFT, a gate of the p-type TFT, and an upper capacitor electrode by using a half-tone mask instead of some of normal masks to reduce the number of masks, and changing impurity concentrations of semiconductor films located in regions which become a channel of the n-type TFT, a source and a drain of the n-type TFT, a channel of the p-type TFT, a source and a drain of the p-type TFT, and an lower capacitor electrode, by using a pattern of the half-tone mask and a normal mask.

Growing community of inventors

Hachioji, Japan

Yoshiaki Toyota