Fujitsu Corporation

Yoshiaki Tanida

Yoshihiro Sugiyama

Yoshihisa Iba

Kiyoshi Irino

Yoshihiro Sugita

Yusuke Morisaki

A method is performed by a computer for a preprocessing for calculating binding free energy between a first substance and a second substance. The method includes: obtaining a binding structure of the first substance and the second substance under a condition where the second substance is constrained such that a binding state of the second substance to the first substance is maintained in a predetermined state; and then, based on the obtained binding structure, obtaining the binding structure under a condition where the second substance is not constrained.

Method and apparatus for preprocessing of binding free energy calculation, and binding free energy calculation method

A method for searching for a modification site of a peptide molecule includes: calculating, by a computer, a second steric structure of the peptide molecule by using data of a first steric structure of the peptide molecule, the first steric structure being a steric structure of the peptide molecule in a complex structure of a target molecule and the peptide molecule, the second steric structure being a stable steric structure of the peptide molecule in a state where a steric configuration of a main chain of the peptide molecule in the first steric structure is fixe; and comparing data of the second steric structure with the data of the first steric structure in order to search for a side chain having a difference in steric configuration between the two steric structures.

Method for searching for modification site of peptide molecule and information processing apparatus

A method for calculating binding free energy, where the method includes a plurality of steps each including adding a distance restraint potential between a binding calculation target molecule and a target molecule, wherein the method is a method for calculating binding free energy between the binding calculation target molecule and the target molecule using a computer, and wherein anchor points of the binding calculation target molecule in the plurality of the steps are identical anchor points, and anchor points of the target molecule in the plurality of the steps are different anchor points.

Method for calculating binding free energy, calculation device, and program

In a free energy difference estimation method, the partial free energy difference indicates a bound state between a target compound and a first candidate compound bindable to the target compound, and is stored in a storage part for each value of a binding constant. A change region, in which a partial free energy difference is equal to or greater than a predetermined change value, is specified in a region of the binding constant. The partial free energy difference of a second candidate compound in the change region is interpolated based on the partial free energy difference acquired in each of a previous region and a following region by using an approximation function.

Free energy difference estimation method and simulation apparatus

The semiconductor device comprises an intermediate layer formed on a semiconductor substrate, the intermediate layerbeing formed of an oxide containing a first element which is either of a III group element and a V group element, an insulation film formed on the intermediate layer, the insulation film being formed of an oxide of a second element which is the other of the III group element and the V group element, and an electrodeformed on the insulation film. Because the intermediate layer of the oxide containing the first element is formed, even when the gate insulation film is formed of AlOor others, the interface state density can be depressed to be low. Thus, the semiconductor device can have low interface state density and small flat band voltage shift even when AlO, etc. is used as a material of the insulation film.

Semiconductor device having low interface state density and method for fabricating the same

An ultra high-speed semiconductor device has a high-K dielectric gate insulator layer, wherein spread of impurities to a Si substrate from a gate electrode through the high-K dielectric gate insulator layer, and spread of oxygen and metallic elements from the high-K dielectric gate insulator layer to the Si substrate or the gate electrode are suppressed by arranging the high-K dielectric film sandwiched by nitrogen atomic layers on the Si substrate that is covered by an oxygen atomic layer.

Growing community of inventors

Kawasaki, Japan

Yoshiaki Tanida