Samsung Electronics Co., Ltd.

Fujitsu Corporation

Fujitsu Microelectronics Limited

Fujitsu Semiconductor Limited

Yoshiaki Shimizu

Hisao Suzuki

Masashi Kijima

Kenji Ito

Kunihiko Gotoh

Osamu Kobayashi

A lens barrel having a reduced size and a related optical apparatus is disclosed. The lens barrel includes a cylindrical fixed frame and a cylindrical movable frame. The cylindrical first frame includes an outer wall extending around the optical axis and a cylindrical second frame is inserted thereto the first frame. The first frame includes a notch having first assembly portions at both side portions. The second frame includes second assembly portions that are assembled to be fixed to the first assembly portions.

Lens barrel and optical apparatus

A lens barrel and an optical device having small sizes by saving a space for inner components such as a moving group while stably retaining and moving the inner components are provided. The lens barrel retains lenses while allowing movement along an optical axis. The lens barrel includes: a first frame; a second frame positioned inside the first frame; and n linear guide structures configured to allow movement of the second frame relative to the first frame along the optical axis, wherein the n linear guide structures include: n linear guide concave parts spaced apart from each other in a circumferential direction around the optical axis and extending along the optical axis; and n linear guide convex parts engaging with the n linear guide concave parts in a relatively movable manner, wherein some of the n linear guide concave parts are provided on the first frame, and the others of the n linear guide concave parts are provided on the second frame (n is an integer equal to or greater than 2).

Lens barrel and optical instrument

A D/A conversion circuit for performing D/A conversion at high speeds. The D/A conversion circuit includes a resistor string including a plurality of resistor elements connected between a low-potential power supply and a high-potential power supply. A plurality of first switch groups are connected to the connection nodes between the resistor elements for selectively outputting voltages at the connection nodes. The outputs of the switches of the first switch groups are connected in common to a corresponding one of the nodes. The plurality of nodes are connected to an output terminal of the D/A conversion circuit via a second switch group. Predetermined switches of the first switch groups are connected in parallel to third switches to apply voltages to the nodes.

A/D conversion circuit for use with low-potential and high-potential power supplies

An A/D conversion circuit including a plurality of resistor elements connected in series between a low-potential power supply and a high-potential power supply. The A/D conversion circuit includes a plurality of comparators that compare a reference voltage divided by each of the resistor elements with an analog input voltage, the comparators having a sample-and-hold function for holding a sampled analog input voltage. The plurality of comparators also include a high-order bit comparator and a low-order bit comparator having different sampling sources. The high-order bit comparator may be configured to compare the analog input voltage and one of the reference voltages to obtain a determination result. The low-order bit comparator may old the analog voltage from the time that the low-order bit comparator retrieves the analog input voltage until the low-order bit comparator performs comparison.

A level shift circuit for sustaining the activation and inactivation response of a transistor with respect to an input signal in a preferable manner. The level shift circuit includes a shift circuit for converting an input signal having a first voltage to an output signal having a second voltage that is higher than the first voltage. The voltage generation circuit includes a control voltage generation circuit, for generating control voltage having a generally constant voltage level irrespective of the level of a power supply voltage, and a bias generation circuit. The bias generation circuit generates bias voltage so that the node voltage of the shift circuit is substantially equalized with the control voltage.

Level shift circuit and semiconductor device

D/A conversion circuit and A/D conversion circuit

A cyclic type D/A converter having an error detection and correction system including: a code conversion circuit for converting a binary code to a multi-states code; a digital-to-analog conversion circuit connected to the code conversion circuit for converting the multi-states code to an analog value; a detection circuit operatively connected to the digital-to-analog conversion circuit for converting the analog value to a digital code; and a control circuit operatively connected to the code conversion circuit, digital-to-analog conversion circuit and detection circuit for calculating a voltage difference between the analog value at a predetermined code value and another analog value adjacent to the predetermined code value, and for calculating a differential non-linearity error from the voltage difference based on the digital code, in order to obtain error and correction values of capacitors forming the digital-to-analog conversion circuit.

Growing community of inventors

Kasugai, Japan

Yoshiaki Shimizu