Sharp Kabushiki Kaisha Corporation

Yoshiaki Nozaki

John Kevin Twynam

Hiroshi Kawamura

Naoyasu Iketani

Junichi Nakamura

Keiichi Sakuno

Tomohiro Nozawa

Masatomo Hasegawa

Shinichi Nakayama

This composite semiconductor device has a normally-on first field effect transistor and a normally-off second field effect transistor connected in series between first and second terminals, gates of the first and second field effect transistors being connected to second and third terminals, respectively, and N diodes being connected in series in a forward direction between a drain and a source of the second field effect transistor. Therefore, a drain-source voltage (Vds) of the second field effect transistor can be restricted to a voltage not higher than a withstand voltage of the second field effect transistor.

Composite semiconductor device

A semiconductor device includes a lead framehaving a first lead, a second leadand a third lead. A power transistoris placed on the first lead, and the power transistoris connected to the first lead. The power transistorhas a drain electrode on one side opposite to a first leadside, and this drain electrode is connected to a Cu chipon the power transistor. The Cu chipis connected to the second leadvia Al wires. As a result, during wire bonding of the Al wires, it becomes possible to absorb shocks due to wire bonding by the Cu chip, or disperse pressure due to wire bonding by the Cu chip, or diffuse heat due to wire bonding by the Cu chip

Semiconductor device and manufacturing method therefor

A semiconductor device includes a photodiode formed using a silicon substrate, a wide-bandgap semiconductor layer formed on the silicon substrate and having a bandgap larger than that of silicon, and a switching element formed using the wide-bandgap semiconductor layer. The switching element is electrically connected to the photodiode so as to be on/off-controlled by a control signal from the photodiode.

Semiconductor device

In a voltage clamp circuit, a normally-on type field-effect transistor having a negative threshold voltage has a drain connected to an input node, a source connected to an output node and grounded via a resistance element, and a gate supplied with an output voltage of a variable direct-current power supply. When a voltage at the output node becomes higher than a clamping voltage because of voltage drop of the resistance element, the field-effect transistor is tuned off. Accordingly, the output voltage is limited to be at most the clamping voltage. Thus, a response speed is higher than those of conventional voltage clamp circuits using diodes or the like.

Voltage clamp circuit and semiconductor device, overcurrent protection circuit, voltage measurement probe, voltage measurement device and semiconductor evaluation device respectively using the same

A light is emitted from a light emitting element toward the other surface in a thickness direction of a scanning mirror which can be angularly displaced about an axial line. At least either one of a first light receiving portion and a second light receiving portion receives a light which is emitted from the light emitting element and reflected by a reflecting mirror. The first light receiving portion, the second light receiving portion, and the signal output section produce an electronic signal containing position information which indicates a position which is irradiated with the above-mentioned light. This position information indicates an amount of angular displacement of the scanning mirror. On the basis of this position information, a driving section scans the scanning mirror so that the predetermined irradiation position can be irradiated with a light emitted from a first light source.

Growing community of inventors

Iga, Japan

Yoshiaki Nozaki