Hitachi, Ltd.

Renesas Technology Corp.

Renesas Electronics Corporation

Hitachi Ulsi Systems Co., Ltd.

Other

Hitachi Device Engineering Co., Ltd.

Hitachi Vlsi Engineering Corp.

Hitachi, Ltd. & Engineering Corp.

Hitachi Vlsi

Hitachi Vsli Eng. Corp.

Yoshiaki Kamigaki

Shinichi Minami

Kozo Katayama

Hitoshi Kume

Kazuhiro Komori

Toshiaki Nishimoto

Satoshi Meguro

Toshihiro Tanaka

Mitsuru Hiraki

Nozomu Matsuzaki

Yutaka Shinagawa

Masamichi Fujito

Takashi Yamaki

Kazufumi Suzukawa

Hiroyuki Tanikawa

Yukiko Umemoto

Masataka Kato

Hideo Sunami

Katsuhiro Shimohigashi

Masaaki Terasawa

Hiroo Masuda

Kazunori Furusawa

Eiji Takeda

Tadashi Muto

Hideki Yasuoka

Yokichi Itoh

Fukuo Owada

Shoji Shukuri

Yoshio Sakai

Toshihisa Tsukada

Toshiaki Masuhara

Osamu Minato

Yoshifumi Kawamoto

Tetsuo Adachi

Takanori Yamazoe

Yoshimune Hagiwara

Takaaki Hagiwara

Kazuyoshi Shoji

Yasurou Kubota

Hiroshi Yoshigi

Fumiyuki Inose

Takeo Kanai

Shinji Nabetani

Kazuto Izawa

Toshiko Koizumi

Hidefumi Mukohda

Yasunori Ikeda

Shun-ichi Saeki

Shin-ichi Minami

Yuko Nabetani

A semiconductor device includes a plurality of nonvolatile memory cells (). Each of the nonvolatile memory cells comprises a MOS type first transistor section () used for information storage, and a MOS type second transistor section () which selects the first transistor section. The second transistor section has a bit line electrode () connected to a bit line, and a control gate electrode () connected to a control gate control line. The first transistor section has a source line electrode () connected to a source line, a memory gate electrode () connected to a memory gate control line, and a charge storage region () disposed directly below the memory gate electrode. A gate withstand voltage of the second transistor section is lower than that of the first transistor section. Assuming that the thickness of a gate insulating film of the second transistor section is defined as tc and the thickness of a gate insulating film of the first transistor section is defined as tm, they have a relationship of tc&#x3c;tm.

Semiconductor device

A semiconductor memory device having nonvolatile memory cells each formed of a MISFET having both a floating gate and a control gate and first and second semiconductor regions serving as the source and drain regions, respectively. In accordance with the method of manufacture thereof, an impurity, for example, arsenic, is introduced to form both the first and second semiconductor regions but with the second semiconductor region having a lower dose thereof so that the first semiconductor region formed attains a junction depth greater than that of the second semiconductor region, and both the first and second semiconductor regions have portions thereof extending under the floating gate electrode. The device and method therefor further feature the formation of MISFETs of peripheral circuits.

Method of manufacturing a semiconductor integrated circuit device having single-element type non-volatile memory elements

A multi-storage nonvolatile memory of high density, high speed and high reliability has a memory transistor and switch transistors disposed on both the sides of the memory transistor. The memory transistor includes a gate insulating film having discrete traps and a memory gate electrode, whereas the switch transistors include switch gate electrodes. The gate insulating film has the discrete traps for storing information charge, can locally inject carriers, and one memory cell constitutes a multi-storage cell for storing at least information of 2 bits. The switch transistors having the switch gate electrodes realize source side injection. The memory transistor is fommed together with the switch transistors in self-aligned diffusion. The memory gate electrode of the memory transistor is connected to a word line so as to perform word-line erase.

Semiconductor integrated circuit having discrete trap type memory cells

A nonvolatile memory device has a plurality of nonvolatile memory cells in which a memory gate electrode is formed over a first semiconductor region with a gate insulating film and a gate nitride film interposed therebetween. First and second switch gate electrodes, and first and second signal electrodes used as source/drain electrodes are formed on both sides of the memory gate electrode. Electrons are injected into the gate nitride film from the source side to store information in the memory cells. The memory gate electrode and the switch gate electrodes extend in the same direction. The application of a high electric field to a memory cell which is not selected for writing can be avoided owing to the switch gate electrodes being held in a cut-off state.

Method for forming nonvolatile memory device including insulating film containing nitrogen (nitride)

Semiconductor integrated circuit device having single-element type non-volatile memory elements

A manufacturing technique for a zener diode which includes forming a first semiconductor region in a region such as a well region at a primary face of a semiconductor substrate and then forming a second semiconductor region of opposite conductivity type thereover. The second semiconductor region covers an area greater than the underlying first semiconductor region. The method further calls for forming an insulating film on the primary face of the substrate followed by the forming connection holes in the insulating film to expose an upper part of the second semiconductor region located outside the area covered by the junction affected between the first and second semiconductor regions. This is followed by the formation of a wire at the upper part of the insulating film in which an electrical connection is affected between the wire and the second semiconductor region through the plural connection holes which are distributively arranged.

Method of manufacturing a semiconductor integrated circuit device

Nonvolatile semiconductor memory device employing transistors having different gate withstand voltages for enhanced reading speed

Growing community of inventors

Takamatsu, Japan

Yoshiaki Kamigaki