Sharp Laboratories of America, Inc

Other

Sharp Kabushiki Kaisha Corporation

Yoshi Ono

Sheng Teng Hsu

Wei Gao

Tingkai Li

John F Conley, Jr

Fengyan Zhang

Yanjun Ma

David R Evans

Bruce Dale Ulrich

Pooran Chandra Joshi

Jer-shen Maa

Douglas James Tweet

Wei-Wei Zhuang

John Hartzell

Rajendra Solanki

Wei Pan

Masahiro Adachi

Jong-Jan Lee

Lisa Stecker

Hong Ying

Apostolos T Voutsas

Katsuji Iguchi

Keizo Sakiyama

Robert A Barrowcliff

Steven Roy Droes

Gregory M Stecker

Jun Jiao

Lifeng Dong

Josh M Green

Osamu Nishio

Sheng Tang Hsu

A grayscale mask made from semi-transparent film layers is provided, along with an associated fabrication method. The method provides a transparent substrate, such as quartz, with a surface. A first layer of a semi-transparent film having a surface with a first surface area, is formed overlying the substrate surface. At least a second layer of the semi-transparent film having a surface with a second surface area greater than the first surface area, is formed overlying the first layer. A first vertical region is formed having a light first attenuation parameter through the combination of substrate, first layer, and second layer. A second vertical region is formed having a light second attenuation parameter through the combination of the first layer and substrate, and a third vertical region is formed having a light third attenuation parameter through the substrate.

Semi-transparent film grayscale mask

A multi-layered barrier metal thin film is deposited on a substrate by atomic layer chemical vapor deposition (ALCVD). The multi-layer film may comprise several different layers of a single chemical species, or several layers each of distinct or alternating chemical species. In a preferred embodiment, the multi-layer barrier thin film comprises a Tantalum Nitride layer on a substrate, with a Titanium Nitride layer deposited thereon. The thickness of the entire multi-layer film may be approximately fifty Angstroms. The film has superior film characteristics, such as anti-diffusion capability, low resistivity, high density, and step coverage, when compared to films deposited by conventional chemical vapor deposition (CVD). The multi-layered barrier metal thin film of the present invention has improved adhesion characteristics and is particularly suited for metallization of a Copper film thereon.

Multilayered barrier metal thin-films

A method is provided for forming an error diffusion-derived sub-resolutional grayscale reticle. The method forms at least one partial-light transmissive layer overlying a transparent substrate. At least one unit cell in formed in the transmissive layer. The unit cell is formed by selecting the number of reduced-transmission pixels in the unit cell, and forming a sub-pattern of reduced-transmission pixels in the unit cell. The unit cell is sub-resolutional at a first wavelength.

Error diffusion-derived sub-resolutional grayscale reticle

A sub-resolutional grayscale reticle and associated fabrication method have been presented. The method provides a transparent substrate, and forms a plurality of coincident partial-light transmissive layers overlying the transparent substrate. A pattern is formed, sub-resolutional at a first wavelength, in at least one of the transmissive layers. If there are n transmissive layers, the reticle transmits at least (n+1) intensities of light. In one aspect, each of the plurality of transmissive layers has the same extinction coefficient and the same thickness. In other aspects, the transmissive layers may have different thickness. Then, even if the extinction coefficients are the same, the attenuation of light through each layer is different. The transmission characteristics of the reticle can be further varied if the transmissive layers have different extinction coefficients. Likewise, the transmission characteristics through the sub-resolutional patterns can be varied.

Sub-resolutional grayscale reticle

A method of fabricating a grayscale mask includes preparing a silicon wafer; depositing a layer of SiNdirectly on the silicon wafer; implanting Hions into the silicon wafer to form a defect layer; depositing a first layer of SiONdirectly on the SiNlayer; depositing a layer of SRO directly on the first layer of SiON; patterning and etching the SRO layer to form a microlens array in the SRO layer; depositing a second layer of SiONon the SRO microlens array; CMP to planarize the second layer of SiON; bonding and cleaving the planarized SiONto a quartz plate to form a graymask reticle; etching to remove silicon from the bonded structure; etching to remove SiONand SiNfrom the bonded structure; and cleaning and drying the graymask reticle.

Method of fabricating grayscale mask using smart cut&#xae; wafer bonding process

A method of fabricating an electroluminescent device includes, on a prepared substrate, depositing a rare earth-doped silicon-rich layer on gate oxide layer as a light emitting layer; and annealing and oxidizing the structure to repair any damage caused to the rare earth-doped silicon-rich layer; and incorporating the electroluminescent device into a CMOS IC. An electroluminescent device fabricated according to the method of the invention includes a substrate, a rare earth-doped silicon-rich layer formed on the gate oxide layer for emitting a light of a pre-determined wavelength; a top electrode formed on the rare earth-doped silicon-rich layer; and associated CMOS IC structures fabricated thereabout.

Terbium-doped, silicon-rich oxide electroluminescent devices and method of making the same

A method of fabricating a grayscale mask includes preparing a quartz wafer; depositing a layer of SiNon the quartz wafer; depositing a layer of titanium/TEOS directly on the SiNlayer on the backside of the quartz wafer; removing the layer of SiNfrom the front side of the quartz wafer; depositing a layer of SRO directly on the front side of the quartz wafer; patterning a microlens array on the SRO layer; etching the SRO layer to form a microlens array in the SRO layer; depositing a layer of titanium; patterning and etching the titanium layer; depositing a layer of SiONon the SRO microlens array; CMP to planarize the layer of SiONremoving the titanium/TEOS layer from the backside of the quartz wafer; bonding the planarized SiONto a quartz reticle plate; and etching to remove SiNfrom the bonded structure to form a grayscale mask reticle.

Method of fabricating a grayscale mask using a wafer bonding process

A method of fabricating a grayscale reticle includes preparing a quartz wafer substrate; depositing a layer of SRO on the top surface of the quartz substrate; patterning and etching the SRO to form an initial microlens pattern using step-over lithography; patterning and etching the SRO to form a recessed pattern in the SRO; depositing an opaque film on the SRO; patterning and etching the opaque film; depositing and planarizing a planarizing layer; cutting the quartz wafer into rectangular pieces sized to be smaller than a selected blank reticle; bonding the a piece a to selected reticle blank to form a grayscale reticle; and using the grayscale reticle to form a microlens array on a photoimager.

Method of making a grayscale reticle using step-over lithography for shaping microlenses

A ZnO film with a C-axis preference is provided with a corresponding fabrication method. The method includes: forming a substrate; forming an amorphous AlOfilm overlying the substrate; and, forming a ZnO film overlying the AlOfilm at a substrate temperature of about 170&#xb0; C., having a C-axis preference responsive to the adjacent AlOfilm. The substrate can be a material such as Silicon (Si) (100), Si (111), Si (110), quartz, glass, plastic, or zirconia. The AlOfilm can be deposited using a chemical vapor deposition (CVD), atomic layer deposition (ALD), or sputtering process. Typically, the AlOlayer has a thickness in the range of about 3 to 15 nanometers (nm). The step of forming the ZnO film having a C-axis preference typically means that the ZnO film has a (002) peak at least 5 times greater than the (100) peak, as measured by X-ray diffraction (XRD).

ZnO film with C-axis orientation

A device and a fabrication method are provided for an EL device with a nanotip-contoured phosphor layer. The method comprises: forming a bottom electrode with nanotips; forming a phosphor layer overlying the bottom electrode, having irregularly-shaped top and bottom surfaces; and, forming a top electrode overlying the phosphor layer. The bottom electrode top surface has a nanotip contour, and the phosphor layer irregularly-shaped top and bottom surfaces have contours approximately matching the bottom electrode top surface nanotip contour. In one aspect, a contoured bottom dielectric is interposed between the bottom electrode and the phosphor layer, having top and bottoms surfaces with contours approximately matching the nanotip contour. Likewise, a top dielectric may be interposed between the top electrode and the phosphor layer, having a bottom surface with a contour approximately matching the contour of phosphor layer top surface.

Nanotip electrode electroluminescence device with contoured phosphor layer

A method is provided for forming a rare earth element-doped silicon oxide (SiO) precursor with nanocrystalline (nc) Si particles. In one aspect the method comprises: mixing Si particles into a first organic solvent, forming a first solution with a first boiling point; filtering the first solution to remove large Si particles; mixing a second organic solvent having a second boiling point, higher than the first boiling point, to the filtered first solution; and, fractionally distilling, forming a second solution of nc Si particles. The Si particles are formed by immersing a Si wafer into a third solution including hydrofluoric (HF) acid and alcohol, applying an electric bias, and forming a porous Si layer overlying the Si wafer. Then, the Si particles are mixed into the organic solvent by depositing the Si wafer into the first organic solvent, and ultrasonically removing the porous Si layer from the Si wafer.

Rare earth element-doped oxide precursor with silicon nanocrystals

A method is provided for forming a silicon oxide (SiOx) thin-film with embedded nanocrystalline silicon (Si). The method deposits SiOx, where x is in the range of 1 to 2, overlying a substrate, using a high-density (HD) plasma-enhanced chemical vapor deposition (PECVD) process. As a result, the SiOx thin-film is embedded with nanocrystalline Si. The HD PECVD process may use an inductively coupled plasma (ICP) source, a substrate temperature of less than about 400&#xb0; C., and an oxygen source gas with a silicon precursor. In one aspect, a hydrogen source gas and an inert gas are used, where the ratio of oxygen source gas to inert gas is in the range of about 0.02 to 5. The SiOx thin-film with embedded nanocrystalline Si typically has a refractive index in the range of about 1.6 to 2.2, with an extinction coefficient in the range of 0 to 0.5.

Silicon oxide thin-films with embedded nanocrystalline silicon

A method of making a doped silicon oxide thin film using a doped silicon oxide precursor solution includes mixing a silicon source in an organic acid and adding 2-methoxyethyl ether to the silicon source and organic acid to from a preliminary precursor solution. The resultant solution is heated, stirred and filtered. A doping impurity is dissolved in 2-methoxyethanol to from a doped source solution, and the resultant solution mixed with the previously described resultant solution to from a doped silicon oxide precursor solution. A doped silicon oxide thin film if formed on a wafer by spin coating. The thin film and the wafer are baked at progressively increasing temperatures and the thin film and the wafer are annealed.

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A method of selectively enhancing the sensitivity of a metal oxide sensor includes fabricating a ZnO sensor having a ZnO sensor element therein; and exposing the ZnO sensor element to a plasma stream.

Method to manipulate selectivity of a metal oxide sensor

A method, and corresponding transistor structure are provided for protecting the gate electrode from an underlying gate insulator. The method comprises: forming a gate insulator overlying a channel region; forming a first metal barrier overlying the gate insulator, having a thickness of less than 5 nanometers (nm); forming a second metal gate electrode overlying the first metal barrier, having a thickness of greater than 10 nm; and, establishing a gate electrode work function exclusively responsive to the second metal. The second metal gate electrode can be one of the following materials: elementary metals such as p+ poly, n+ poly. Ta, W, Re, RuO2, Pt, Ti, Hf, Zr, Cu, V, Ir, Ni, Mn, Co, NbO, Pd, Mo, TaSiN, and Nb, and binary metals such as WN, TaN, and TiN. The first metal barrier can be a binary metal, such as TaN, TiN, or WN.

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Camas, WA, United States of America

Yoshi Ono