Matsushita Electric Industrial Co., Ltd.

Yorito Ota

Hiroyuki Masato

Masanori Inada

Kazuo Eda

Junko Iwanaga

Manabu Yanagihara

Shigeru Morimoto

Masahiro Maeda

Shinichi Sonetaka

Yasuyuki Toyoda

Kazuhiro Arai

Makoto Kitabatake

Mitsuru Tanabe

Hiromasa Fujimoto

Yasuhito Kumabuchi

Atsushi Nakagawa

Morio Nakamura

Daisuke Ueda

Kaoru Inoue

Kazuaki Takahashi

Suguru Fujita

Hidetoshi Ishida

Morikazu Sagawa

Hiroyuki Sakai

Akiyoshi Tamura

Takahiro Yokoyama

Tadayoshi Nakatsuka

Katsunori Nishii

Masaaki Nishijima

Keiichi Murayama

Osamu Ishikawa

Katsuhiko Kawashima

Mitsuru Nishitsuji

Tomoya Uda

Chinatsu Adachi

The present invention aims at providing a heterojunction bipolar transistor having improved breakdown voltage on operation for high power output, and includes: a GaAs semiconductor substrate; an n-type GaAs sub-collector layer; an n-type GaAs collector layer; a p-type GaAs base layer; an emitter layer; an n-type GaAs emitter cap layer; and an n-type InGaAs emitter contact layerThe emitter layerhas a multilayer structure including an n-type or non-doped first emitter layerand an n-type second emitter layerwhich are laminated in sequence. The first emitter layeris made of a semiconductor material including Al, while the second emitter layeris made of InGa1-xP (0&#x3c;x&#x3c;1).

Heterojunction bipolar transistor having an emitter layer made of a semiconductor material including aluminum

A high frequency device includes a transmission/reception amplifierthat amplifies and outputs an input signal, and a transmission/reception switchthat gang switches internally so that during transmission an input of the transmission/reception amplifieris connected to an up mixer and an output of the transmission/reception amplifieris connected to an antenna unit, and so that during reception the output of the transmission/reception amplifieris connected to a down mixer and the input of the transmission/reception amplifieris connected to the antenna unit

Low cost high frequency device having compact mounting area, high frequency amplification method, wireless communication device and mobile telephone including low cost and high frequency circuit having compact mounting area

There is provided a bipolar transistor that enables a desirably enhanced high-frequency performance to be obtained when used as an oscillation amplifier of an oscillation circuit, and that is miniaturized and reduced in cost. A capacitance adjustment line () connected to a base pad () forms a parasitic capacitor with respect to an Ncollector substrate by interposing an insulating film () and an N collector substrate therebetween, thereby increasing collector-base capacitance C. This capacitor is incorporated into a bipolar transistor, which functions as an oscillation amplifier and has a small transistor operation region (), at least as a part of a balance capacitor constituting the oscillation circuit in the course of production of a semiconductor.

Bipolar transistor, oscillation circuit, and voltage controlled oscillator

A semiconductor device includes a SiC substrate and an ohmic electrode, a semiconductor member including a SiC member and a SiGe member being formed between the SiC substrate and the ohmic electrode, wherein the semiconductor member is composed of a SiGe member formed on a SiC member, and the ohmic electrode is formed on the SiGe member, whereby the ohmic electrode with a low resistance can be formed on the SiC substrate without conducting a heat treatment at a high temeprature.

Semiconductor device and method for producing the same

Bipolar transistor, for voltage controlled oscillator using a capacitance adjustment line

A bipolar transistor includes the first group of transistors, the second group of transistors, the third group of transistorsand the fourth group of transistors. The groups of transistors have unit transistors with emitters, bases and collectors that are connected electrically in parallel and the number of unit transistors is different from group to group and 2, 4, 8, and 16, respectively.

Bipolar transistor

A semiconductor device includes a SiC substrate and an ohmic electrode, a semiconductor member including a SiC member and a SiGe member being formed between the SiC substrate and the ohmic electrode, wherein the semiconductor member is composed of a SiGe member formed on a SiC member, and the ohmic electrode is formed on the SiGe member, whereby the ohmic electrode with a low resistance can be formed on the SiC substrate without conducting a heat treatment at a high temperature.

The diode of the present invention includes: a cathode electrode and an anode electrode that are disposed on a semiconductor substrate and are spaced apart from each other; and a shielding metal member placed between the cathode and anode electrodes.

Diode, method for fabricating the diode, and coplanar waveguide

A package according to the present invention includes: a support for mounting a semiconductor component on the upper surface thereof; a positioning control plate, which is secured to the support and includes an opening or a notch; and a lead provided on the support for establishing electrical continuity between the semiconductor component mounted on the support and an external component. The positioning control plate houses at least a lower part of the semiconductor component inside the opening or the notch, thereby controlling a position of the semiconductor component on the support.

Package, semiconductor device and method for fabricating the semiconductor device

Disclosed is a compound semiconductor field effect transistor. The compound semiconductor field effect transistor has a charge absorption layer and a semiconductor laminated structure. The charge absorption layer includes a compound semiconductor layer of a first conductive type formed in a part of a compound semiconductor substrate having a semi-insulating layer. The semiconductor laminated structure includes at least an active layer including a compound semiconductor layer of a second conductive type epitaxially grown so as to cover the charge absorption layer and a region of the semi-insulating surface where the charge absorption layer is not formed. A source electrode is formed on the semiconductor laminated structure, being electrically connected to the charge absorption layer.

Compound semiconductor field effect transistor and method for the fabrication thereof

The diode of the present invention includes: a cathode electrode and an anode electrode that are disposed on a semi-conductor substrate and are spaced apart from each other; and a shielding metal member placed between the cathode and anode electrodes.

A semiconductor device having a single substrate made of silicon carbide; an epitaxial film made of Al,In,Ga,N which is selectively formed on the single substrate; an amplifier section including a gate formed on the single substrate and a source layer and a drain layer which are formed within the single substrate; and another amplifier section formed on the epitaxial film.

Method for forming ohmic electrode, and semiconductor device

A first metal film and a second metal film, both of which are made of Ni or the like, are deposited on the upper surface of a substrate made of SiC. In such a state, the interface between the first metal film and the substrate and the interface between the second metal film and the substrate both form a Schottky contact. Next, laser light is irradiated from above the upper surface of the substrate only onto the first metal film on the substrate after the diameter of the top end of the laser light has been reduced. Thus, since the metal-semiconductor interface between the first metal film and the substrate is turned into an alloy owing to the energy of the laser light without heating the entire substrate, an ohmic contact can be formed in the interface between the first metal film and the substrate. As a result, an ohmic electrode can be constituted by the first metal film.

Method for forming an ohmic electrode

A conductive layer made of n-type GaAs is formed on a semi-insulating substrate made of GaAs. A pair of contact regions made of n.sup.+ -type GaAs are formed on the conductive layer. A source electrode is formed on the left-hand contact region, while a drain electrode is formed on the right-hand contact region. A gate recessed region is formed in the region of the conductive layer located between the pair of contact regions so that a gate electrode is formed on the gate recessed region. A depressed portion is formed in the gate recessed region of the conductive layer. The wall face of the depressed portion closer to the gate electrode is flush with or protruding from the side face of the gate electrode facing the drain electrode.

Field-effect transistors and method of manufacturing the same

A channel layer made of n-type GaAs doped with Si, a hole absorption layer made of InGaAs having a valance band higher in energy level than that of GaAs, and an undoped layer made of GaAs are formed sequentially on a semi-insulating substrate made of GaAs. A gate recess region having a pair of sidewall portions each consisting of an upper sidewall composed of the undoped layer and a lower sidewall composed of the hole absorption layer is formed on the channel region. The channel region is exposed in the gate recess region. An indent having an undercut configuration is formed in the lower sidewall of the gate recess region. A gate electrode is formed to extend over a stepped portion composed of the sidewall portion of the gate recess region closer to a drain electrode.

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Kobe, Japan

Yorito Ota