Samsung Electronics Co., Ltd.

Yoondong Park

Sukpil Kim

Kwang Soo Seol

Taeyon Lee

Kwangsoo Seol

Jung-Kyu Jung

HyunSeok Lee

Deok-kee Kim

Kwang-Soo Seol

Junemo Koo

Tae Eung Yoon

Sangjun Choi

HyungJin Bae

Ihara Hisanori

Wonjoo Kim

HoonSang Oh

Sungkwon Hong

A non-volatile memory device can include a plurality of immediately adjacent offset vertical NAND channels that are electrically coupled to a single upper select gate line or to a single lower select gate line of the non-volatile memory device.

Non-volatile memory devices including vertical NAND channels and methods of forming the same

A photodetector may have a structure including conductive patterns and an intermediate layer interposed between the conductive patterns. A length L of at least one side of the second conductive pattern that overlaps the first conductive pattern and the intermediate layer satisfies the equation L=&#x3bb;/2n, wherein the nis an effective refractive index of a surface plasmon waveguide formed of the first conductive pattern, the intermediate layer, and the second conductive pattern during a surface plasmon resonance. Heat generated in the intermediate layer when the electromagnetic wave having the wavelength &#x3bb; is incident thereon generates a current variation.

Photodetector and image sensor including the same

An image sensor includes an active region including a photoelectric conversion region and a floating diffusion region, which are separated from each other, defined by a device isolation region on a semiconductor substrate, and a transfer transistor including a first sub-gate provided on an upper surface of the semiconductor substrate and a second sub-gate extending within a recessed portion of the semiconductor substrate on the active region between the photoelectric conversion region and the floating diffusion region, wherein the photoelectric conversion region includes a plurality of photoelectric conversion elements, which vertically overlap each other within the semiconductor substrate and are spaced apart from the recessed portion.

Image sensor

A variable resistance memory array includes at least one variable resistance memory cell, wherein each variable resistance memory cell includes a well having a first type; and a cell structure on the well, the cell structure including a structure having a second type different from the first type and a variable resistance layer on the structure.

Variable resistance memory and memory system including the same

Disclosed is a nonvolatile memory device which includes a plurality of cell array layers stacked on a semiconductor substrate. Each of the plurality of cell array layers includes a plurality of strings. Each of the plurality of strings has string and ground select transistors and a plurality of memory cells connected in series between the string and ground select transistors. A common source line is on each of the plurality of cell array layers. Each common source line is connected with first sides of the plurality of strings on a corresponding cell array layer. A plurality of bit lines is connected with second sides of the plurality of strings disposed on the cell array layers and arranged in the vertical direction to the semiconductor substrate. A plurality of word lines is connected with the plurality of memory cells.

Nonvolatile memory device and method for operating the same

Provided are a three-dimensional semiconductor device and a method of operating the same. The three-dimensional semiconductor device includes: a plurality of word line structures on a substrate; active semiconductor patterns between the plurality of word line structures; and information storage elements between the plurality of word line structures and the active semiconductor patterns. Each of the plurality of word line structures includes a plurality of word lines spaced apart from each other and stacked, and the active semiconductor patterns include electrode regions and channel regions, the electrode regions and the channel regions having different conductive types and being alternately arranged.

Three-dimensional semiconductor devices

Growing community of inventors

Osan-si, South Korea

Yoondong Park