Skhynix Inc.

Yoon Soo Jang

Jun Hyuk Lee

Seung Won Kim

Eun Joung Lee

A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array configured to include memory cells, a peripheral circuit configured to perform an erase operation and a soft program operation and a control circuit configured to control the peripheral circuit so that the memory cells are programmed though a hot carrier injection HCI method when the soft program operation is performed.

Semiconductor memory device and method of operating the same

A semiconductor memory device and a method of operating the same are disclosed. The semiconductor memory device includes a memory cell array including memory blocks, a voltage generator configured to generate a precharge voltage; and a read and write circuit coupled to the memory blocks through bit lines, and configured to supply the precharge voltage to the bit lines when a selected memory block is accessed. Here, the precharge voltage varies depending on a distance between the read and write circuit and the selected memory block.

A semiconductor memory device and a method of operating the same are provided. The semiconductor memory device includes memory cells stacked on a substrate. The method includes applying a reference voltage to an unselected drain select line, applying a drain selection voltage to a selected drain select line, and applying a word line voltage to a normal word line. Before the word line voltage is applied to the normal word line, a positive voltage is applied to a dummy word line to bounce the unselected drain select line.

A semiconductor memory device is operated by forming channels in a cell string including a plurality of memory cells and coupled between a bit line and a source line, applying first and second erase voltages having different levels to the channels through the bit line and the source line, respectively, and applying a first word line voltage to at least one word line among word lines coupled to the plurality of memory cells.

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Chungcheongbuk-do, South Korea

Yoon Soo Jang