Skhynix Inc.

Hynix Semiconductor Inc.

Yoon Jae Shin

Jung Hyuk Yoon

Chang Yong Ahn

Sang Kug Lym

Dong Keun Kim

Jee Yul Kim

Min Chul Shin

Jun Ho Cheon

Jae Boum Park

In Soo Lee

Byoung Chan Oh

Min Jeong Kim

Doo Hyun Son

A semiconductor device includes an internal voltage control circuit including an amplifier circuit and a plurality of drivers. The internal voltage control circuit is configured to drive an internal voltage through the sharing of the amplifier circuit and a driver that is activated, among the plurality of drivers, after the start of a standby operation and an active operation. The semiconductor device also includes a core circuit including a plurality of banks. The core circuit is configured to perform an operation of a bank that is activated, among the plurality of banks, by receiving the internal voltage.

Semiconductor device for generating an internal voltage

An electronic device includes a monitoring signal generation circuit configured to receive an internal voltage to generate a monitoring signal, based on a voltage selection signal in a test mode, and an internal voltage drive circuit configured to receive the internal voltage and monitoring signal from the monitoring signal generation circuit and drive the internal voltage to compensate for the monitoring signal when the monitoring signal is distorted according to a leakage current in the test mode.

Electronic devices related to compensation of monitoring signals

A semiconductor memory apparatus includes a column address decoding unit configured to decode a column address and generate a column select signal; a row address decoding unit configured to decode a row address and generate a word line select signal; a driving driver unit configured to provide different voltages to a plurality of resistive memory elements in response to the column select signal; a sink current control unit configured to generate a plurality of sink voltages with different voltage levels in response to the word line select signal; and a plurality of current sink units configured to flow current from the plurality of respective resistive memory elements to a ground terminal in response to the plurality of sink voltages.

Semiconductor apparatus capable of providing the same current to all memory elements

A voltage generation circuit is provided. The voltage generation circuit may include an enable signal generator, a voltage controller, and a voltage driver. The enable signal generator may generate an enable signal based on a test signal and an active signal. During activation of the enable signal, the voltage controller may compare a reference voltage with a feedback voltage, amplify the result of comparison, and generate a drive voltage. The voltage driver may output an internal voltage by driving the drive voltage, and generate the feedback voltage corresponding to the internal voltage. The feedback voltage may be pulled down during activation of the enable signal.

Circuit for generating voltage

Semiconductor apparatus comprising a plurality of current sink units

Semiconductor memory apparatus comprising a plurality of current sink units

A word line driver circuit according to an embodiment includes a driving unit configured to output a sub word line driving signal in response to a word line select signal and a main word line driving signal, a transmission unit configured to transmit the sub word line driving signal to a word line in response to a first enable signal, and a precharge unit configured to precharge a potential of the word line.

Word line driver circuit and resistance variable memory apparatus having the same

A semiconductor memory apparatus may include a read/write circuit unit configured to receive an external voltage, to read data from a memory cell array, and to generate a pre-read signal, while an internal voltage is generated during a test mode, and a controller configured to selectively drive a write circuit unit in response to the pre-read signal.

Semiconductor memory apparatus and test method thereof

A write driver is configured to determine a magnitude and an application time of a pre-emphasis current pulse in response to control codes generated according to parasitic components on a path from a write driver to a program target cell and a resistance value of the program target cell, and supply a preset program current to a memory circuit block by adding a pre-emphasis current to the preset program current in a program mode.

Write driver, variable resistance memory apparatus including the same, and operation method

A nonvolatile memory apparatus includes a memory cell array including a plurality of sub arrays. A plurality of analog-to-digital converters (ADCs) configured to sense sensing voltages outputted from memory cells of the plurality of sub arrays and a path selection unit configured to electrically couple the plurality of sub arrays with the plurality of ADCs in one-to-one correspondence in a first operation mode, and electrically couple the plurality of ADCs with a terminal of a power supply voltage in a second operation mode.

Nonvolatile memory apparatus, and semiconductor system and computer device using the same

A write control device includes a switching unit configured to selectively supply a write current in response to a driving control signal, a driving unit configured to supply a driving current to a memory cell corresponding to the write current applied through the switching unit, and an over-driving control unit coupled to an output node of the driving unit and configured to over-drive the output node in response to the driving control signal.

Write control device

A nonvolatile memory apparatus includes a memory cell configured to receive a first current and a second current through a bit line which is connected to a sensing node; a sensing node level control unit configured to be driven in response to a control signal, compare a reference voltage and a voltage of the sensing node, and output a driving signal to a driving node; a first current driving unit configured to output the first current to the driving node by using a first driving voltage in response to the driving signal; and a current control unit configured to perform a discharge operation of the bit line or electrically connect the driving node and the sensing node, in response to the control signal.

Nonvolatile memory apparatus

A reference voltage generator generates a reference voltage having a stable voltage level insensitive to a temperature variation. A reference voltage generator includes a current generating unit configured to generate a reference current proportional to temperature increase, a voltage adjusting unit configured to adjust a reference voltage corresponding to a current level of the reference current, and a start-up driving unit configured to drive and amplify the reference voltage while the voltage adjusting unit operates.

Reference voltage generator

A nonvolatile semiconductor device and a method for testing the same are provided. The nonvolatile semiconductor device includes a current generating unit configured to generate a set write current depending on a step pulse that is generated based on a reference current and output the set write current to a memory cell, and a current measuring unit configured to measure a step duration of the step pulse and output a measured result outside of a chip during an activation period of a test enable signal.

Growing community of inventors

Icheon-si, South Korea

Yoon Jae Shin