Samsung Display Co., Ltd.

Yoomin Ko

Sunho Kim

Juchan Park

Pilsuk Lee

Hyewon Kim

Sungjin Hong

Chung Sock Choi

Joohee Jeon

Sun Hee Lee

Sang Hoon Kim

Gun Hee Kim

Taehoon Yang

Sanghoon Kim

Seungchan Lee

Jonghee Park

Hyang-A Park

Cheaeun Kim

Yerim Son

A display device including a base layer, a plurality of voltage lines and a transistor that are disposed on the base layer, a light emitting element electrically connected to the transistor and including a cathode, and a connection wiring line electrically connected to the light emitting element and including a first connection part spaced apart from a light emitting opening defined in the light emitting element, and a second connection part electrically connected to the transistor. The first connection part overlaps some of the plurality of voltage lines in plan view.

Display device having reduced afterimage defects

A display device includes a substrate, a circuit layer disposed on the substrate, and which includes a pixel circuit part having a first pixel circuit region and a second pixel circuit region, and a driving circuit part that is adjacent to the pixel circuit part, and a display layer disposed on the circuit layer, and which includes including a first display element region that overlaps the first pixel circuit region, a second display element region that overlaps the second pixel circuit region, and a third display element region that overlaps the driving circuit part, pixel circuits formed in the first pixel circuit region supply a first current to display elements formed in the first display element region, and pixel circuits formed in the second pixel circuit region supply a second current to display elements formed in the second and third display element regions.

Display device

A display panel includes a base layer including a first display region, a second display region adjacent to the first display region, and a non-display region adjacent to the first display region and the second display region, a demultiplexer circuit overlapping the second display region, a first pixel including a first pixel driver overlapping the first display region, and a first light emitting element overlapping the first display region and electrically connected with the first pixel driver, and a second pixel including a second pixel driver overlapping the first display region, and a second light emitting element and a third light emitting element that are electrically connected with the second pixel driver. At least one of the second light emitting element and the third light emitting element overlaps the second display region and is disposed on the demultiplexer circuit.

Display panel

A display device includes a main light emitting part, a first sub-light emitting part spaced apart from the main light emitting part in a first direction, a main pixel circuit connected to the main light emitting part, and overlapping at least a portion of the main light emitting part, a first sub-pixel circuit, without overlapping the first sub-light emitting part, connected to the first sub-light emitting part, and spaced apart from the first sub-light emitting part in a second direction that is perpendicular to the first direction, a main data line extending in the first direction, and connected to the main pixel circuit, a first sub-data line extending in the first direction, and connected to the first sub-pixel circuit, and a first bridge line connecting the main data line to the first sub-data line.

A display panel includes a transistor, a light emitting device electrically connected to the transistor, a connection wiring electrically connecting the transistor to the light emitting device and including side surfaces, a capping pattern disposed on the transistor and contacting at least a side surface among side surfaces, an upper insulating layer disposed on the transistor and including a first opening that overlaps the at least the side surface, and a pixel definition layer disposed on the upper insulating layer and covering the first opening of the upper insulating layer.

A pixel circuit includes a first transistor, a second transistor including a control electrode receiving a write gate signal generated based on clock signals having a duration of M horizontal time, M being a positive integer greater than or equal to 2, a first electrode receiving a data voltage, and a second electrode electrically connected to the first transistor, a third transistor including a control electrode receiving a compensation gate signal generated based on a first next write gate signal applied after the write gate signal is applied, a first and second electrodes electrically connected to the first transistor, and a fourth transistor including a control electrode receiving an initialization gate signal generated based on a previous write gate signal applied before the write gate signal is applied, a first electrode receiving a first initialization voltage, and a second electrode electrically connected to the first transistor.

Pixel circuit and display device having the same

A display panel includes a first display area and a second display area. A plurality of base pixel parts are disposed in the second display area, and each base pixel part includes 'k' first color light emitting elements. A controller receives image signals, and the image signals include first image signals corresponding to the first display area and second image signals corresponding to the second display area. The second image signals are divided into a plurality of base signal parts respectively corresponding to the plurality of base pixel parts, and each base signal part includes “m*n” first color image signals. The controller generates color image data by rendering “p” color image signals of “m*n” color image signals included in a corresponding base signal part and “(m*n)−p” referenced image signals included in a referenced signal part adjacent to the corresponding base signal part.

A display panel including a transistor, a light-emitting element including a first electrode, a light emitting layer disposed on the first electrode, and a second electrode disposed on the light emitting layer, the second electrode being electrically connected to the transistor, an insulating layer disposed between the transistor and the light-emitting element, and connection wiring.

A gate driver includes: a signal generator configured to generate a gate signal, and output the gate signal to a first output terminal; and an inverted signal generator configured to generate an inverted gate signal based on the gate signal, and output the inverted gate signal to a second output terminal, wherein the inverted signal generator includes: a first transistor connected between a first node connected to the second output terminal and a first driving power supply terminal, and including a PMOS transistor; and a second transistor connected between the first node and a second driving power supply terminal, and including an NMOS transistor, and wherein a second node connected to the first output terminal is connected to a gate electrode of each of the first and second transistors.

Gate driver and display device including the same

A display apparatus includes a substrate, a component area arranged over the substrate, the component area and including a first component area and a second component area, the first component area including a plurality of first pixel groups and a first transmission area arranged between the first pixel groups, the second component area including a plurality of second pixel groups and a second transmission area arranged between the second pixel groups, a main display area arranged over the substrate, the main display area including main display elements and main pixel circuits respectively connected to the main display elements, and a component arranged in the component area. A planar shape of the first transmission area may be different from a planar shape of the second transmission area.

Display apparatus

A display device includes a display panel that displays an image and including a first display area, in which a plurality of first pixels is disposed, and a second display area which is adjacent to the first display area and in which a plurality of second pixels is disposed and a gate driving block which overlaps the second display area and transmits driving signals to the plurality of first pixels and the plurality of second pixels. Each of the plurality of first pixels includes a first shielding layer. Each of the plurality of second pixels includes a second shielding layer. A first common voltage is applied to the first shielding layer, and a second common voltage having a voltage level different from a voltage level of the first common voltage is applied to the second shielding layer.

A pixel of an organic light emitting diode ('OLED') display device includes a switching transistor which transfers a data voltage, a storage capacitor which stores the data voltage transferred by the switching transistor, a driving transistor which generates a driving current based on the data voltage stored in the storage capacitor, an emission control transistor which selectively forms a path for the driving current in response to an emission control signal, an OLED which emits light based on the driving current, and a supplemental electrode overlapping a gate electrode of the driving transistor, the supplemental electrode having a first voltage for a predetermined time period from a time point at which the emission control signal has a turn-on level, and having a second voltage after the predetermined time period.

Pixel of an organic light emitting diode display device, and organic light emitting diode display device

A display panel includes: a substrate comprising a main display area and an auxiliary display area comprising a first pixel area, a second pixel area, and a transmission area; a first pixel in the first pixel area and comprising a first pixel electrode, a first opposite electrode, and a first intermediate layer between the first pixel electrode and the first opposite electrode; a second pixel in the second pixel area and comprising a second pixel electrode, a second opposite electrode, and a second intermediate layer between the second pixel electrode and the second opposite electrode; a pixel-defining layer on the first pixel electrode and the second pixel electrode and having a first opening and a second opening through which centers of the first pixel electrode and the second pixel electrode are respectively exposed; and a first barrier wall on the pixel-defining layer.

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Suwon-si, South Korea

Yoomin Ko