Samsung Electronics Co., Ltd.

Yongwoo Jeong

Sungho Seo

Kwanwoo Noh

Myungsub Shin

Dongwoo Nam

Hyunkyu Jang

Hwaseok Oh

JinHyeok Choi

Jeongsu Kim

A storage device and a storage system including the same are provided. The storage device includes a reference clock pin configured to receive a reference clock signal from a host, a reference clock frequency determination circuitry configured to determine a reference clock frequency from the reference clock signal received through the reference clock pin, and a device controller circuitry configured to perform a high speed mode link startup between the host and the storage device according to the reference clock frequency.

Storage device and storage system including the same

A method of operating a storage device includes receiving a first bit sequence including a request for changing a data rate from a host according to a first data rate through an input signal pin; sending a second bit sequence including a response to the request for changing a data rate to the host at the first data rate through an output signal pin; and changing the data rate to a second data rate according to whether a tail-of-burst (TOB) indicating an end of the second bit sequence is output.

Storage device adjusting data rate and storage system including the same

Disclosed is a storage device which includes an interface circuit that exchanges data with a host device, and a power management unit that supplies a power to the interface circuit. The interface circuit includes a first input terminal receiving a first signal from the host device, a second input terminal receiving a second signal complementary to the first signal from the host device, a receive module processing the first signal and the second signal, a squelch circuit detecting levels of the first signal and the second signal, and a reference clock detector detecting whether a reference clock for operating the storage device is received. The power management unit selectively supplies a power to the squelch circuit based on a result of the detection by the reference clock detector.

Storage device configured to change power state based on reference clock from host device and method for operating the same

Disclosed is an electronic device which includes an application processor configured to generate a reference clock, a first storage device configured to receive the reference clock from the application processor through a clock input port, to output the reference clock to a clock output port, and to communicate with the application processor by using the reference clock, and a second storage device configured to receive the reference clock from the clock output port and use the reference clock for communication with the first storage device.

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Bucheon-si, South Korea

Yongwoo Jeong