Samsung Electronics Co., Ltd.

Yongsuk Kwon

Kyungsoo Kim

Jinin So

Jeonghyeon Cho

Jin Woo Jung

Jonggeon Lee

Nayeon Kim

Kyoungwan Woo

Sungjin Kim

Sangsoo Lee

Sunmin Hwang

Jonghoon Kim

Jong-Geon Lee

Myeongcheol Kim

Hyongjin Ban

Munhwan Choi

Jonghyun Seok

Youngjun Seo

Sooyoung Nam

Yoonsung Nam

An accelerator module includes a plurality of memories and a controller. The controller includes a plurality of memory controllers, a plurality of processing units, and a managing circuit. The plurality of memory controllers and the plurality of memories form a plurality of memory sub-channels. The plurality of processing units perform computational operations on a plurality of data stored in or read from the plurality of memories. The managing circuit redistributes tasks performed by the plurality of processing units or changes connections between the plurality of memory controllers and the plurality of processing units in response to a first memory sub-channel and a first processing unit being in a heavy-workload state.

Accelerator module and computing system including the same

A memory includes: a request register configured to receive a first signal including a requester identifier using a first protocol from a host and configured to output a first priority corresponding to the requester identifier; a checker module configured to receive a second signal including a command and a request type from the host and using a second protocol that is different than the first protocol, where the checker module is configured to receive the first priority from the request register, and where the checker module is configured to determine a second priority of the command based on the first priority and the request type; a command generator configured to generate an internal command for memory operation based on the command; and a memory controller configured to schedule the internal command in a command queue based on the second priority.

Memory device and scheduling method thereof

A memory module includes a memory substrate including a main connector and an auxiliary connector, configured to be connected to an external device; and a plurality of memory chips mounted on at least one of a first surface or a second surface of the memory substrate, wherein the main connector is disposed on one side of the memory substrate, and the auxiliary connector is disposed on the second surface of the memory substrate.

Memory module, main board, and server device

An example electronic device may include at least one processor and a communication device. The at least one processor may be configured to identify a call generating request for first user identification information defined in a first metaverse service; establish, through the communication device, a media session between the electronic device and a first server corresponding to the first metaverse service, based on the call generating request; receive, through the communication device, first data for representing a virtual space associated with an avatar corresponding to the first user identification information, using the media session; provide first content representing the virtual space associated with the avatar using the received first data; transmit, through the communication device, a message including user manipulation information input corresponding to the content; receive, through the communication device, second data for representing a virtual space associated with the avatar set based on the user manipulation information, using the media session; and provide second content representing the virtual space associated with the avatar using the received second data.

Electronic device performing call with user of metaverse and method for operating the same

A booting method of a computing system, which includes a memory module including a processing device connected to a plurality of memory devices, including: powering up the computing system; after powering up the computing system, performing first memory training on the plurality of memory devices by the processing device in the memory module, and generating a module ready signal indicating completion of the first memory training; after powering up the computing system, performing a first booting sequence by a host device, the host device executing basic input/output system (BIOS) code of a BIOS memory included in the computing system; waiting for the module ready signal to be received from the memory module in the host device after performing the first booting sequence; and receiving the module ready signal in the host device, and performing a second booting sequence based on the module ready signal.

Booting method of computing system including memory module with processing device mounted

Memory modules and memory systems having the same are provided. A memory module may include command/address terminals, data terminals, at least one monitoring terminal, a buffer, and a plurality of semiconductor memory devices. The buffer may be configured to receive and buffer data applied through the data terminals and a command/address applied through the command/address terminals to generate buffered write data and a buffered command/address. The buffer may be configured to buffer the buffered write data and the buffered command/address to generate module data and a module command/address, and store and then transmit at least one portion of the buffered write data as monitoring data through the at least one monitoring terminal. The plurality of semiconductor memory devices may be configured to receive and store the module data in response to the module command/address.

Memory modules and memory systems having the same

A memory module includes a first memory device, a second memory device, and a processing buffer circuit that is connected to the first memory device and the second memory device (independently of each other) and a host. A processing buffer circuit is provided, which includes a processing circuit and a buffer. The processing circuit processes at least one of data received from the host, data stored in the first memory device, or data stored in the second memory device based on a processing command received from the host. The buffer is configured to store data processed by the processing circuit. The processing buffer circuit is configured to communicate with the host in compliance with a DDR SDRAM standard.

Memory modules and methods of operating same

An electronic device may be configured to receive a message for a second external electronic device, from a first external electronic device through a first network associated with the first external electronic device among a plurality of rich communication suite (RCS) networks using a communication circuit, to determine whether to transmit the message based on a profile of the second external electronic device including at least one throttling metric for the first network among the plurality of RCS networks stored in a memory and a network state of the first network, and to convert the message based on a protocol of a second network and to transmit the converted message to the second external electronic device through the second network based on determining to transmit the message.

Growing community of inventors

Goyang-si, South Korea

Yongsuk Kwon