Boe Technology Group Co., Ltd.

Hefei Boe Joint Technology Co., Ltd.

Hefei Xinsheng Optoelectronics Technology Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Boe Technology Groupco., Ltd.

Boe Technology Group

Boe Technology Group Go., Ltd.

Yongqian Li

Xuehuan Feng

Can Yuan

Zhidong Yuan

Meng Li

Pan Xu

Dacheng Zhang

Zhongyuan Wu

Lang Liu

Quanhu Li

Zhenfei Cai

Dongxu Han

Cuili Gai

Song Meng

Min He

Xing Zhang

Yicheng Lin

Longyan Wang

Liu Wu

Ling Wang

Chen Hui Xu

Cheng Xu

Tieshi Wang

Jingquan Wang

Wenchao Bao

Kun Cao

Yue Wu

Haixia Xu

Yu Wang

Hao Liu

Chi Zhang

Baoxia Zhang

Luke Ding

Fei Yang

Guoying Wang

Xing Yao

Miao Liu

Jingwen Yin

Xuelian Cheng

Jinxia Hu

Chao Jiao

Xiuting Liu

Zehua Ding

Gang Wang

Guangcai Yuan

Ying Wang

Yuting Zhang

Qi Hu

Xiaolong Wei

Shi Sun

Yubao Kong

Enming Xie

Zhenhua Qiu

Lin Sun

Ming Wang

Wei Chen

Li Sun

Bin Zhou

Ning Liu

Tao Sun

Ying Han

Leilei Cheng

Jingbo Xu

Jun Liu

Miao Zhang

Chen Xu

Dandan Zhou

Taejin Kim

Mingming Xie

Chuanchuan Chang

Xuehan Feng

A driving circuit includes a pull-up node control circuit, a pull-down node control circuit and an output circuit; the pull-up node control circuit controls a potential of the pull-up node under the control of an input signal and a reset signal; the output circuit controls the output terminal to output a signal under the control of the potential of the pull-up node and the potential of the pull-down node; a channel length of at least one transistor among at least some transistors included in the output circuit, at least some transistors whose gate electrodes are electrically connected to the input terminal included in the pull-up node control circuit, and at least some transistors whose gate electrodes are electrically connected to the reset terminal included in the pull-up node control circuit is greater than a channel length of another transistor included in the driving circuit.

Driving circuit, display substrate and display device

A profiled display panel, including a display area. The display area includes a plurality of display sub-areas; a plurality of cascade signal lines for coupling adjacent two of the gate driving sub-circuits. At least one cascade signal line includes a first cascade trace extending in a first direction and a second cascade trace extending in a second direction. The first cascade trace includes a plurality of first conductive patterns arranged on a first conductive layer and second conductive pattern arranged on a second conductive layer. The plurality of first conductive patterns are electrically connected to the second conductive pattern; and the second cascade trace includes a third conductive pattern arranged on the first conductive layer.

Profiled display panel and display device

A display substrate and a display device are provided. The display substrate includes a base substrate, and a gate driving circuit and a plurality of signal lines arranged on the base substrate; the plurality of signal lines include a first clock sub-signal line and a second clock sub-signal line; an orthographic projection of the first clock sub-signal line on the base substrate and an orthographic projection of the second clock sub-signal line on the base substrate are arranged side by side, and the first clock sub-signal provided by the first clock sub-signal line is the same as the second clock sub-signal provided by the second clock sub-signal line.

Display substrate and display device

A display substrate, a method for operating the same, and a display device are provided. The display substrate includes a base substrate and a display unit. In the sub-pixel of the display substrate, the light emitting device includes a first electrode including a first portion and a second portion spaced apart from each other; the display unit further includes a connection structure and a first transfer electrode, the connection structure is electrically connected with the first portion of the first electrode and the second portion of the first electrode, and includes a connection portion located in the non-light-emitting region; the first transfer electrode is electrically connected with the first pole of the driving transistor and includes a portion located in the non-light-emitting region, and the connection portion is electrically connected with the portion of the first transfer electrode located in the non-light-emitting region.

Display substrate and method for operating the same, and display apparatus

Provided are a display panel, a driving method therefor and a display device. The display panel includes pixel driving circuits and a first gate driving circuit. The pixel driving circuit includes a driving circuit connected to first to third nodes for inputting a driving current to the third node through the second node, and a first switching unit having a first terminal connected to the third node and a second terminal connected to a sensing signal terminal for electrically connecting, in response to a signal at a control terminal thereof, the third node and sensing signal terminal. The first gate driving circuit includes a first output terminal corresponding to the pixel driving circuit and connected to the control terminal. The first output terminal outputs an active level pulse during data writing stage and black frame insertion stage of a driving cycle of the pixel driving circuit corresponding thereto.

Display panel, driving method therefor, and display device

An array substrate and a display device are provided. The array substrate includes a base substrate, and gate lines, a gate driving structure, an interconnecting structure and an insulating layer. The gate lines are electrically connected with the gate driving structure through the interconnecting structure; the insulating layer is located between the gate lines and the interconnecting structure, and includes a first via hole and a second via hole. The gate line includes a first connecting portion and a second connecting portion, and the second connecting portion is located between the gate driving structure and the first connecting portion; the first connecting portion is electrically connected with the interconnecting structure through the first via hole, and a straight line extending in a direction perpendicular to the base substrate passes through the second connecting portion, the second via hole and the interconnecting structure in turn.

Array substrate and display device

A display substrate and a manufacturing method therefor, and a display device. The display substrate includes: a base substrate including a special-shaped display area and a frame area located on one side of the special-shaped display area; and the special-shaped display area includes a first display area and a second display area on located on one side of the first display area, and the second display area is arranged in contact with the frame area; a group of data lines located on the base substrate and located in the first display area and the second display area; a group of fan-out lines located on a side of a layer where the group of data lines are located away from the base substrate, located in the first display area, and electrically connected to the data lines; and a group of dummy leads.

Display substrate and manufacturing method therefor, and display device

A display substrate and a display device are provided. The display substrate includes a light emitting element disposed on a base substrate, and an encapsulation layer, a connection layer, a light extraction layer, a polarization conversion layer and a polarization layer stacked sequentially at a light exiting side of the light emitting element. The light extraction layer is configured to convert at least a portion of light emitted by the light emitting element incident onto the light extraction layer into circularly polarized light with a set rotational direction to pass through the light extraction layer. The polarization conversion layer is configured to convert the circularly polarized light passing through the light extraction layer into linearly polarized light, with a polarization direction parallel to a direction of a light transmission axis of the polarization layer; the connection layer is configured to bond the light extraction layer to the encapsulation layer.

Display substrate and preparation method therefor, and display apparatus

A shift register is provided and includes a display input reset circuit, an inverter circuit, at least one output circuit and a first detection circuit; the display input reset circuit, the inverter circuit and the output circuit are connected to a pull-up node; the inverter circuit and the at least one output circuit are connected to a pull-down node; the first detection circuit is connected to a signal acquisition point, an acquisition control terminal, and a first signal detection line, and configured to acquire a voltage at the signal acquisition point in response to a signal from the acquisition control terminal and output a detection voltage corresponding to the acquired voltage to the first signal detection line, an external first chip adjusts an active level voltage from the third power supply terminal according to the detection voltage; the signal acquisition point includes the pull-down node and/or a signal output terminal.

Shift register, gate driving circuit, and display apparatus

Provided is a display substrate, including: a base substrate; a plurality of sub-pixels arranged in an array on the base substrate, each of the sub-pixels including a light-emitting drive circuit, a reset circuit, a compensation circuit and a light-emitting element; wherein the light-emitting drive circuit and the reset circuit are connected to the light-emitting element, the light-emitting drive circuit is configured to provide a drive signal to the light-emitting element, and the reset circuit is configured to provide a reset signal to the light-emitting element; the compensation circuit is connected to the light-emitting drive circuit, and the compensation circuit is configured to provide a compensation signal to the light-emitting drive circuit; wherein at least two of the sub-pixels share a same target circuit, and the target circuit includes at least one of the reset circuit and the compensation circuit.

Provided are a display substrate and a display device. The display substrate includes a base substrate, and gate lines extending in a first direction, data lines extending in a second direction and pixel units that are on the base substrate, the first direction intersecting the second direction; each pixel unit including sub-pixels, each sub-pixel including a pixel circuit; the pixel circuit including at least a switching transistor, a drive transistor, a sensing transistor, and a storage capacitor; for each pixel circuit, the switching transistor, the drive transistor, and the sensing transistor therein are all on a same side of the storage capacitor; the switching transistor is at an intersection of the gate line and the data line connected thereto, and the switching transistor is adjacent to the sensing transistor in the first direction and adjacent to the drive transistor in the second direction.

A method for compensating display brightness, a circuit for compensating display brightness, and a display device are provided. The method for compensating display brightness is applicable to a display device. A first group of sub-pixel rows in the display device perform normal display and black frame insertion display in a same frame display period. A second group of sub-pixel rows in the display device perform normal display in a current frame display period and an adjacent next frame display period, and perform black insertion display in the adjacent next frame display period. A first interval period is provided between the current frame display period and the adjacent next frame display period. The method for compensating includes: compensating luminous brightness of the first group of sub-pixel rows and/or compensating luminous brightness of the second group of sub-pixel rows.

Method for compensating display brightness, circuit for compensating display brightness, and display device

A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, a first control circuit, a blanking control circuit, a first output circuit, and a second output circuit. The input circuit is configured to control a level of a first node; the first control circuit is configured to control a level of the second node; the blanking control circuit is configured to control the level of the first node and the level of the second node; the first output circuit is configured to output a first output signal at the first output terminal; and the second output circuit is configured to output a second output signal at the second output terminal under control of the level of the second node.

Shift register unit, driving method, gate driving circuit, and display device

A display substrate and a display device are provided. The display substrate includes a base substrate and sub-pixels on the base substrate. The sub-pixels are arranged in a sub-pixel array in a first direction and a second direction, the first direction intersecting with the second direction. The display substrate further includes data lines extended in the first direction, and the data lines are connected in one-to-one correspondence with the sub-pixels in columns in each row of sub-pixels, so as to provide data signals respectively; the display substrate further includes auxiliary electrode lines extended in the first direction which are configured to be electrically connected with a second electrode of the light emitting element to provide a second power voltage; each of the auxiliary electrode lines is spaced from any one of the plurality of data lines by at least one column of sub-pixels.

An array substrate is provided. The array substrate includes a plurality of subpixels and a plurality of detection line structures. The plurality of subpixels are arranged in an array of a plurality of rows and a plurality of columns along a first direction and a second direction. Each of the plurality of detection line structures includes at least one first detection line extending along the first direction; adjacent (n)th row and (n+1)th row of subpixels in the array form a subpixel row group, one detection line structure is provided between the (n)th row and (n+1)th row of subpixels in each subpixel row group, and the detection line structure is configured to be connected to the (n)th row and (n+1)th row of subpixels and detect electrical characteristics of first transistors or light-emitting elements in the subpixels.

Array substrate having signal line structures and power lines alternatively arranged one by one

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Beijing, China

Yongqian Li