Skhynix Inc.

Korea Advanced Institute of Science and Technology

Yongkee Kwon

Wongyu Shin

Leesup Kim

Youngsuk Moon

Jaemin Jang

John Dongjun Kim

Jungho Ahn

Hongsik Kim

Dong-gun Kim

Dayeon Yun

Byungchul Hong

A memory device includes a memory-operator unit including memory circuits and operating circuits, and a request processing circuit configured to process a memory request and an operation request transmitted from a software domain to transmit a memory command and an address corresponding to the memory request and an operation command and an address corresponding to the operation request to the memory-operator unit. The request processing circuit is configured to schedule processing of the memory request and the operation request, based on a status of the memory request remaining in the request processing circuit, when the operation request is transmitted to the request processing circuit from the software domain.

Memory devices

A memory system may include: a memory controller; a plurality of ranks; and a rank shared bus configured to couple the memory controller and the plurality of ranks. Each of the plurality of ranks may include: a plurality of banks; a rank bus coupled to the plurality of banks and configured to selectively transmit data to the rank shared bus or an intermediate buffer and selectively receive data from the rank shared bus or the intermediate buffer; and an intermediate buffer configured to be selectively coupled to the rank bus or the rank shared bus, according to a first signal from the memory controller.

Memory device supporting rank-level parallelism and memory system including the same

A memory device includes a memory cell region including a plurality of memory cells; a memory cell controller configured to control read and write operation for the memory cell region; one or more NDP engines configured to perform a near data processing (NDP) operation for the memory cell region; a command buffer configured to store an NDP command transmitted from a host; and an engine scheduler configured to schedule the NDP operation for the one or more NDP engines according to the NDP command.

Memory device performing near-data processing using a plurality of data processing engines that independently perform data processing operations, and system including the same

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Seoul, South Korea

Yongkee Kwon