Samsung Electronics Co., Ltd.

Yongjun Kim

Jungwoo Song

Jaerok Kahng

Hyungjin Kim

Jinyong Choi

Minsu Ahn

Reum Oh

Jaekyu Lee

Chang-Yong Lee

Sang-Jun Lee

Yonghun Kim

Hyunsoo Park

Keeshik Park

Donggyun Han

A semiconductor device includes a cell area in which a plurality of memory cells are arranged in an array structure, and a peripheral area in which circuits configured to drive the memory cells are arranged, the peripheral area being next to the cell area. The cell area is divided into a plurality of banks, and the plurality of banks comprise first banks having a base size and second banks having a size of 1/(2*n) (wherein n is an integer greater than or equal to 1) of the base size. The plurality of banks are arranged in a first direction and a second direction perpendicular to the first direction, and the semiconductor device has a shape of a rectangular chip which is elongated in the second direction.

Semiconductor device and semiconductor package including the semiconductor device

A memory device includes a memory cell array storing input data, a clock generator circuit generating first clocks and second clocks using a reference clock, a phase information generator circuit comparing a phase of the reference clock and a phase of at least one of the first clocks and the second clocks and generating phase information as a comparison result, an intermediate data generator circuit serializing a part of input data provided from the memory cell array based on the first clocks to generate first data, serializing a remaining part of the input data to generate second data, and selectively swapping the first data and the second data using the phase information to generate intermediate data, and an output data generator circuit serializing the intermediate data using the second clocks, to output output data through one output data line.

Data output circuit, memory device including the data output circuit, and operating method of the memory device

A semiconductor device includes active pillars protruding from a semiconductor substrate and spaced apart from each other in a first direction and a second direction that is perpendicular to the first direction, a word line extending in the first direction between the active pillars, a drain region disposed in an upper portion of each of the active pillars, and a separation pattern provided between the word line and the drain region. A bottom surface of the separation pattern is disposed at a lower level than a bottom surface of the drain region.

Semiconductor device and method of fabricating the same

A memory device includes a substrate including active areas and isolation areas, trenches in the isolation areas, active patterns in the active areas, the active patterns protruding from the substrate, isolation layers filling the trenches, gate trenches crossing the active patterns and the isolation layers, and gate line stacks filling the gate trenches, a first width of the gate trench in the isolation layer being greater than a second width of the gate trench in the active pattern.

Memory device having buried gate and method of fabricating the same

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Hwaseong-si, South Korea

Yongjun Kim