Samsung Electronics Co., Ltd.

Skhynix Inc.

Seoul National University

Snur & Db Foundation

Agency for Defense Development

Yongjae Lee

Deog-Kyoon Jeong

Hyoungjoo Kim

Jiheon Park

Soyeong Shin

Seunghan Kim

Hongjun Jin

Young-Sik Kim

Valeriy Prushinskiy

Young-Ju Kim

Jaehyoung Park

Seungjun Bae

Kyungtae Nam

Hyungsok Yeo

Yoon-Joo Eom

Jung-Ik Ha

Hye Jung Kwon

Je Hyung Cho

Junyoung Lee

Alexey Bodrov

Suyeon Doo

Bonggyo Seo

Dongsoo Seo

Jeongbu Baek

A lens assembly is provided. The lens assembly includes an image sensor, at least four lenses successively arranged along an optical axis from an object side toward the image sensor side, and at least one band pass filter having a transmittance of 90% to 90% with regard to at least some of light in the wavelength area of 800˜1000 nm. At least one of the lenses is disposed between the band pass filter and the image sensor. With regard to light in the wavelength area of 400˜700 nm, at least one of the lenses has a transmittance of 0% to 10%, and all of the lenses have an average transmittance of 0% to 5%.

Lens assembly and electronic device comprising same

Provided is a lens assembly comprising at least two lenses aligned along a first optical axis; an image sensor configured to receive light guided or condensed through the at least two lenses; and at least one optical member disposed between the at least two lenses and the image sensor to receive light incident through the at least two lenses, and refract or reflect the light at least twice, to guide or emit the light to the image sensor, where a ratio of a longer side of an imaging surface of the image sensor to a longer side of an emission surface of a first optical member closest to the image sensor is within a specified range.

Folded camera for reducing stray light and electronic device including the same

A semiconductor memory device includes a test pattern data storage configured to store test write pattern data in response to a register write command and a register address and output test read pattern data in response to a test read command and a test pattern data selection signal during a test operation, a memory cell array including a plurality of memory cells and configured to generate read data, a read path unit configured to generate n read data, by serializing the read data, and a test read data generation unit configured to generate n test read data, by comparing the test read pattern data with each of the n read data, generated at a first data rate, and generate the n test read data, at a second data rate lower than the first data rate, during the test operation.

Semiconductor memory device and test system including the same

A clock transfer circuit includes a first stage circuit configured to produce an output signal that uses a second signaling technology from an input signal that uses a first signaling technology; and a second stage circuit configured to produce a clock signal by delaying the output signal; wherein the first stage circuit includes a semiconductor device configured to compensate for delay fluctuation caused by fluctuation of power supply voltage between a first power source and a second power source.

Clock transfer circuit including a semiconductor device for compensating delay fluctuation

A semiconductor device includes a delay compensation circuit and a bias control circuit. The delay compensation circuit includes a variable delay circuit configured to generate an output signal by delaying an input signal and configured to compensate, according to a first bias control signal, for delay fluctuation caused by fluctuation of a power supply voltage between a first power source and a second power source. The bias control circuit is configured to generate the first bias control signal to compensate for the delay fluctuation.

Semiconductor device for compensating delay fluctuation and clock transfer circuit including the same

Disclosed is an electronic device which a camera, a memory, and a processor that is operatively connected with the camera and the memory. The processor performs photographing on an external object multiple times depending on a second exposure time shorter than a specified first exposure time by using the camera, obtains a first image set including a plurality of first images depending on the multiple photographing, composes the first image set to generate a second image, identifies a specific area around at least one light source corresponding to a light source included in the second image, and generates a third image where an image effect associated with the light source is added to the specific area, by using the second image. Moreover, various embodiment found through the present disclosure are possible.

Image processing method and electronic device supporting same

A memory device includes memory cell array including a plurality of memory cells that store data, a first transmitter that transmits the data to an external device through a first data line, and a ZQ controller that performs a ZQ calibration operation to generate a first ZQ code for impedance matching of the first data line. The first transmitter encodes the first ZQ code and the first data based on a first clock and drives the first data line based on the encoded result based on a second clock.

Memory device and operation method thereof

Disclosed herein is a power apparatus including a first motor, a second motor connected with the first motor in parallel, a driver configured to supply driving currents to the first and second motors, a current detector configured to detect the driving current of the first motor and the driving current of the second motor, a speed calculator configured to calculate a rotating speed of the first motor and a rotating speed of the second motor, and a controller configured to control the driver based on the rotating speed of the first motor, wherein the controller controls the driver so that the rotating speed of the first motor and the rotating speed of the second motor are the same as each other, when the rotating speed of the first motor and the rotating speed of the second motor are different from each other.

Power apparatus, controlling method thereof and motor driving apparatus therein

The present inventive concept relates to an apparatus and method for multiplexing tracking information output from a plurality of tracking radar systems that are operated upon testing the flight of guided weapons, converting the multiplexed tracking information into a single PCM stream signal, and processing the tracking information together with telemetry data in an integrated manner, thus enabling the tracking information to be simply and economically utilized for test control and measurement tasks. The apparatus for converting multi-channel tracking information for integrated processing of flight data, includes a signal receiver for receiving pieces of tracking information from tracking radar systems through a plurality of input channels, a programmable semiconductor for multiplexing the pieces of tracking information, and converting the multiplexed tracking information into a data stream-type Pulse Code Modulation (PCM) frame, and a line driver for outputting the PCM frame to another piece of equipment.

Apparatus and method for converting multi-channel tracking information for integrated processing of flight data

Growing community of inventors

Suwon-si, South Korea

Yongjae Lee