Lg Display Co., Ltd.

YongHo Kim

HongJae Shin

Jaesung Park

Hoon Choi

Kwangsoo Kim

Seongho Yun

Dongmyoung Kim

Hongjae Shin

A gate driving panel circuit and a display device are discussed. The gate driving circuit in an example includes n gate driving panel circuits configured to output two or more gate signals where, n is a natural number equal to or larger than 2, a start dummy gate driving panel circuit configured to generate a first feedback voltage and transfer a start carry signal to a first gate driving panel circuit among the plurality of gate driving panel circuits, and an end dummy gate driving panel circuit configured to generate a second feedback voltage and transferring an end carry signal to an nth gate driving panel circuit.

Gate driving circuit and display device

The present disclosure relates to a display panel for gate driving and a display device, which include a gate driving panel circuit and are capable of providing a stable power wiring structure for stably supplying high voltages and low voltages to the gate driving panel circuit disposed in the display panel.

Display panel for gate driving and display device

A display device and a gate driving panel circuit including the same are discussed. The gate driving panel circuit in an example includes an output buffer block configured to receive a clock signal and output a scan signal, and a logic block configured to control respective voltages of a Q node and a QB node electrically connected to the output buffer block. The output buffer block includes a pull-up transistor disposed between a clock node to which the clock signal is input and an output node to which the scan signal is output, and a pull-down transistor disposed between a gate low voltage node to which a gate low voltage is applied and the output node. A gate node of the pull-up transistor is electrically connected to the Q node.

Gate driving panel circuit and display device

According to embodiments of the disclosure, a gate driving circuit and a display device may include four buffer groups for driving 4k scan lines, two common logic units for controlling the four buffer groups, and a common sensing circuit controlling to output a sensing driving scan signal to at least one scan line among the 4k scan lines. Thus, it is possible to allow the gate driving circuit to have a low-area structure and to reduce the bezel area of the display device.

Gate driving circuit having a common sensing circuit for controlling scan driving circuits and display device thereof

Disclosed are a gate driving circuit including a first gate output buffer circuit and a control circuit, and a display device including the same. The control circuit may include a first transistor connected between a first driving voltage node and a QB node, two second transistors connected in series between the QB node and a second low level voltage node, a third transistor connected between a connection node of the two second transistors and the first driving voltage node, a fourth transistor connected between the gate node of the first transistor and the first driving voltage node, and two fifth transistors connected in series between the gate node of the first transistor and the second low level voltage node. A connection node of the two fifth transistors may be electrically connected to the source node or the drain node of the third transistor.

Growing community of inventors

Paju-si, South Korea

YongHo Kim