Qualitau, Inc.

Yongbum Cuevas

Gedaliahoo Krieger

Robert M Sikora

Gedaliahoo Kreiger

Electromigration testing is accelerated in the batch fabrication of semiconductor integrated circuits by forming test structures during the metal deposition phase of the batch fabrication process. Test metal lines can be formed on steps etched in a silicon oxide insulating layer with the vertical walls of the steps being greater than twice the thickness of the deposited metal whereby metal is not deposited on the side walls. Alternatively, test lines in the deposit metal layer can be formed by laser ablation or by ultrasound erosion. In another embodiment, electromigration tests are performed directly on the deposit metal layer through use of spaced elongated electrical contacts placed on the deposited metal layer surface. The elongated contacts can be wires of known diameter and length, or the elongated contacts can comprise a plurality of point contacts.

Method for measurement of electromigration in semiconductor integrated circuits

A test circuit for applying bipolar current pulse to first and second terminals of device under test (DUT) includes a first DC current source and a first switch having a first common terminal, a second DC current source and a second switch having a second common terminal, and means for connecting a device under test between the first and second common terminals. A timing generator selectively controls conduction of the first switch and the second switch whereby when the first switch is closed the current from the second DC current source flows through the device under test and the first switch to a circuit ground, and when the second switch is closed the current from the first DC current course flows through the device under test and the second switch to a circuit ground. Pulse repetition rate and duty cycle of the current pulses are controlled by the control voltage pulses from the timing generator.

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Los Gatos, CA, United States of America

Yongbum Cuevas