Samsung Electronics Co., Ltd.

Yong-Yun Park

Hyunwook Lim

Kyungho Ryu

Yongil Kwon

Youngmin Choi

Kilhoon Lee

Jung-Pil Lim

Kyungae Kim

Alankyongho Kim

Sang-woo Kim

Sunkwon Kim

Jinyong Park

Ki-Joon Kim

Jong-seon Kim

Jong-Seon Kim

Sugyeung Kang

Hae-yong Ahn

Jong-Hee Na

Seunghwan Baek

Kang Joo Kim

Min-Hwa Jang

KeunHo Ryu

Byungkoan Kim

Won-Gab Jung

MyeongJun Chae

Junil Park

Alan Kyongho Kim

Provided is a communication system including a first electronic device and a second electronic device connected with each other through first and second channels. The second electronic device includes a reception driver generating a first internal signal based on a first data signal provided by the first electronic device through the first channel, an error detector generating an error detection signal by determining whether an error is included in the first internal signal, and an error adjuster outputting a first feedback signal through the second channel based on the error detection signal, and the first electronic device outputs a second data signal having a voltage swing width determined based on the first feedback signal through the first channel.

Electronic device and communication system including the same

The present disclosure provides transmitter circuits and display devices including the same. In some embodiments, the transmitter circuit includes a run length detector, a modifier, and a scrambler. The run length detector is configured to derive position information indicating a first input data related to a threshold run length from among a plurality of input data in a predetermined bit unit, when a run length of first scrambled data for the first input data meets or exceeds the threshold run length in the predetermined bit unit. The modifier is configured to generate modified input data by inverting at least one bit of the first input data based on the position information. The scrambler is configured to receive the modified input data from the modifier, and generate second scrambled data by scrambling the modified input data with scrambling information.

Transmitter circuit and display device including the same

Disclosed is an operating method of an encoder, which includes receiving a first bit stream including first to N-th bits, determining at least one symbol in the first bit stream, wherein the at least one symbol includes 'M' consecutive bits each having the first bit value or the second bit value, and generating a first data packet including a first header and at least one packet symbol. The first header includes a least symbol address of a first symbol of the at least one symbol and an inverted value of a bit value of the first bit, a first packet symbol of the at least one packet symbol includes a bit value of the first symbol, a least symbol address of a second symbol of the at least one symbol, and an inverted value of a bit value of a next bit of the first symbol.

Electronic device and operating method of a decoder

In a backlight apparatus, a master driving circuit generates a transmission frame including a training period including a clock training pattern and a data period including a plurality of data packets respectively corresponding to the plurality of blocks. A plurality of slave driving circuits correspond to the plurality of blocks, respectively, and are connected to the master driving circuit in a daisy chain structure. Each slave driving circuit receives the transmission frame through the daisy chain structure, recovers a clock based on the clock training pattern, and drives the plurality of light emitting elements included in a corresponding block among the plurality of blocks based on its own data packet among a plurality of data packets.

Backlight apparatus and operating method thereof

Encoder generating data packet, operation method thereof, and operation method of electronic device including encoder

A display driving device is disclosed which includes a source driver that supplies voltages to source lines connected to pixels, detects a slew time of the voltages of the source lines, and outputs the slew time, and a timing controller that receives the slew time from the source driver and updates a way for the source driver to control the voltages depending on the slew time.

Display driving device including source driver and timing controller and operating method for controlling source line slew times

A timing controller that includes a noise detection circuit and a setting control unit. The noise detection circuit includes a detection unit and a reset signal generating unit. The detection unit outputs a detection signal having a first logic level based on at least one of a plurality of reference data toggling asynchronous with a clock signal. The reset signal generating unit outputs a reset signal having a second logic level based on the detection signal. The setting control unit stores setting data and initializes the setting data in response to the reset signal having the first logic level, and the setting data are used to process red, green and blue (RGB) image data.

Timing controller and a display device including the same

A display controller is provided. The display controller includes an external memory and a timing controller which compresses current frame data to generate front first in-first out (FIFO) input data, temporarily stores the front FIFO input data and writes the front FIFO input data to the external memory in a burst mode, and reads data from the external memory in the burst mode, temporarily stores the read data as back FIFO output data, and decodes the back FIFO output data to output previous frame data.

Display controllers including memory controllers

Growing community of inventors

Seoul, South Korea

Yong-Yun Park