Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Skhynix Inc.

Lg Electronics Inc.

Other

Samsung Engineering Co., Ltd.

Yong-Woo Lee

Chang-Hyun Kim

Jae-Jin Lee

Min-Chang Kim

Do-Yun Lee

Seong-Sik Choi

Joo-Woan Cho

Jin-Hee Park

Hoe-Kwon Jung

Hun-Sam Jung

Se-Ki Park

Cheol-Yong Noh

Choon-Myun Chung

Chong-Chul Chai

Mee-Hye Jung

Yong-Il Kim

Young-Gu Kim

Tae-Hyung Rhee

Hyun-Chul Bae

Du-Hwan Chung

Ho-Seon Rew

Hyeun-Sik Nam

Sung-Hoon Kim

Sung-Man Kim

Joo-Young Kim

In-Sun Hwang

Hyoung-Joo Kim

Bong-Jun Lee

Taek-Sun Shin

Hyeong-Jun Park

Sung-Jin Hong

Jae-Seung Hwang

Heu-Gon Kim

Byung-Seo Yoon

Won-Ju Kim

Il-Yong Yoon

Sung-kyu Lee

Il-Pyung Lee

Woo-Hyuk Jang

Chan-Jong Woo

Dong-Gyu Kim

Cheol-Woo Park

Jeong-Ho Lee

Sung-wook Kang

Ju-Young Yoon

Jae-Byung Park

Sung-soo Lee

Hyun Sik Park

Jong-Min Kim

Shin-Tack Kang

Sahng-Ik Jun

Sang-sup Jeong

Jong-Chul Park

Min-Wook Park

Young-Goo Song

Back-Won Lee

Seong-Mo Hwang

Seung-Hwa Ha

Dong-Min Yeo

Su-Mi Lee

Yong-Hwan Kim

Kweon-Sam Hong

Chi-O Cho

Byung-Duk Yang

Byoung-Dae Ye

Sang-Gun Choi

Jae-Joong Kwon

Jae-Chang Choi

Tae-Seok Jang

Yong-Jo Kim

Jae-Sang Lee

Hyung-jae Lee

In-Ho Park

In-Woo Kim

Seon-Bae Kim

Jung-Hee Kim

Won-Seok Kim

Hea-Chun Lee

Seok-Won Kang

Young-Mi Lee

Dong-Kwon Kim

Min-Soo Koo

Sung-hoon Yang

Seung-Hyun Hur

Kyung-Suk Jung

Dae-Hyun Jang

Hyun-Ki Kim

O-Ik Kwon

Min-Chul Chae

Dae-Joung Kim

Chae-Woo Chung

Hyun-duck Son

Young-Gyu Jung

Kuk-Han Yoon

Sang-Hun Park

Toru Tsunekawa

Lars Johan Nilsson

Eun Kyu Lee

Hyung-Jae Lee

Dong-jin Seo

A memory system includes: a first memory module including first volatile memories; a second memory module including second volatile memories, non-volatile memories and a module controller; a memory controller controlling the first and second memory modules through second and third control buses, respectively; and a switch array electrically coupling the second and third control buses, wherein the module controller controls the switch array to electrically couple the second and third control buses in a backup operation for backing up data of the first volatile memories to the non-volatile memories, wherein the first and second memory modules include one or more first memory stacks and one or more second memory stacks, respectively, wherein the first volatile memories are stacked in the first memory stacks, and wherein the second volatile memories, the non-volatile memories and the module controller are stacked in the second memory stacks.

Memory system

Disclosed is an electronic device. The electronic device includes: a display; a communicator comprising a circuitry, for obtaining, from an external device, an image captured by the external device and information about at least one among an acceleration and angular velocity of the external device, the acceleration and angular velocity being measured while capturing an image; and a processor for identifying a degree of movement of the external device per a preset unit time period based on the obtained information, and controlling the display to display the image with an adjusted field of view (FOV) based on the degree of movement.

Electronic device and control method thereof

A memory system includes: a memory module including: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; and a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access data storage memory through the first and second memory devices.

A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

Memory system for dualizing first memory based on operation mode

A memory system includes: a plurality of first memory devices directly or indirectly coupled to one another, each first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a multi-processor including a plurality of processors, each processor executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

Heterogeneous package in DIMM

A memory system includes: a first memory device including a first memory and a first memory controller suitable for controlling the first memory to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application, and accessing data storage memory through the first and second memory devices.

A memory system includes: a first memory device including a plurality of first memories and a first memory controller suitable for controlling the plurality of first memories to store data; a second memory device including a second memory and a second memory controller suitable for controlling the second memory to store data; and a processor suitable for executing an operating system (OS) and an application to access a data storage memory through the first and second memory devices.

A test system may include: a vector storage unit suitable for storing a first test vector corresponding to a first test operation; a test target suitable for performing a test operation corresponding to the test vector stored in a vector storage unit; a comparison unit suitable for comparing a first test result to an expected value to output a first test result value, wherein the first test result is transferred from the test target as a result of the first test operation based on the first test vector; and a vector control unit suitable for modifying the first test vector to generate a second test vector corresponding to a second test operation.

Test apparatus, test system and operating method of test apparatus

A method of fabricating a semiconductor device is provided as follows. A channel layer is formed on a strain relaxed buffer (SRB) layer. A first etching process is performed on the channel layer and the SRB layer to form a plurality of trenches. The trenches penetrate through the channel layer and into the SRB layer to a first depth. First liners are formed on first sidewalls of the trenches having the first depth. The first liners cover the first sidewalls. A second etching process is performed on the SRB layer exposed through the trenches. The second etching process is performed on the SRB layer using a gas etchant having etch selectivity with respect to the first liners so that after the performing of the second etching process, the first liners remain on the first sidewalls.

Semiconductor device and method of fabricating the same

Growing community of inventors

Suwon-si, South Korea

Yong-Woo Lee