Magnachip Semiconductor, Inc.

Itm Semiconductor Co., Ltd.

Yong Won Lee

Seung Hyun Kim

Soo Chang Kang

Dae Won Hwang

Jin Woo Han

Kyung Wook Kim

Ho Seok Hwang

Sang Hoon Ahn

A semiconductor device includes a substrate, a counter-doping region, and a Schottky barrier diode (SBD) in which a breakdown voltage is improved by using counter doping, and a manufacturing method thereof. A breakdown voltage may be improved by lowering a concentration of impurity on the region and enhancing the characteristics of the semiconductor device including the SBD.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a substrate and a source metal formed on the substrate. A gate pad is formed on the substrate adjacent to the source metal. A gate metal is formed on the substrate and surrounds the gate pad and the source metal. A first diode is formed between the gate metal and the source metal.

Low voltage trench metal oxide semiconductor field effect transistor

A power MOSFET includes an insulating layer, a first conductivity type doping layer situated on a bottom of the insulating layer, a second conductivity type body situated on a bottom of the first conductivity type doping layer, a gate electrode adjacent to the bottom of the insulating layer and covered with an insulating film in other regions and projected to penetrate the second conductivity type body, and a source electrode including a first region situated on a top of the insulating layer and a second region in contact with the first conductivity type doping layer by penetrating the insulating layer.

Power MOSFET and method for manufacturing the same

A method for fabricating a semiconductor device is disclosed. A plurality of trenches is formed at a predetermined cell pitch in an upper surface portion of a substrate. A first insulation film is formed on the substrate. A gate electrode is formed and partially filled within each trench. A first conductivity type region is formed in the upper surface portion of the substrate between the trenches. A second conductivity type region is formed in a side surface of the substrate between the trenches and the first conductivity type region. A second insulation film is formed covering the gate electrode within each trench, wherein an upper surface of the second insulation film is positioned lower than an upper surface of the substrate. A source metal layer is formed on the second insulation film and electrically connected to the first conductivity type region and the second conductivity type region.

Growing community of inventors

Bucheon-si, South Korea

Yong Won Lee