Samsung Electronics Co., Ltd.

Yong-tak Lee

Yeong-kwan Kim

Hag-Ju Cho

Sang-Jeong Oh

A semiconductor memory device having a capacitor protection layer and a method for manufacturing the same. A capacitor of the semiconductor memory device is entirely covered with an encapsulating layer having a multi-layered structure. The encapsulating layer comprises at least a blocking layer and a capacitor protection layer, each of which is formed of different materials. The blocking is formed of a material capable of preventing a capacitor dielectric layer from volatilizing and/or capable of preventing a reaction between a material layer under the blocking layer and the capacitor protection layer. The capacitor protection layer is formed of a material layer capable of preventing diffusion of hydrogen into the capacitor dielectric layer. In addition, the semiconductor memory device may has a hydrogen barrier layer as another capacitor protection layer, between the capacitor and a passivation layer.

Semiconductor memory device having capacitor protection layer and method for manufacturing the same

A method for etching a metal layer of a semiconductor device is provided. A metal layer formed on a substrate is etched using a hard mask and a mixed etching gas containing chlorine and oxygen in which the ratio of oxygen gas is preferably about 0.5-0.8. Under such conditions, a metal layer pattern of a fine profile is formed. Since the hard mask is thin, it is possible to prevent etch reactants generated in a process of etching the metal layer from being deposited on the side surface of the resultant formed of the metal layer pattern and the hard mask. As a result, no additional processing is required to remove the etch reactants from the side surfaces and the metal layer etching process is simplified.

Growing community of inventors

Kyungki-do, South Korea

Yong-tak Lee