Hynix Semiconductor Inc.

Yong-Suk Joo

Geun-Il Lee

Byoung-Jin Choi

Joo-Hwan Cho

Geun-II Lee

A semiconductor memory device includes a clock input unit configured to receive a first clock and a second clock from the external. The memory device further includes a frequency conversion unit configured to convert a frequency of the second clock so that the frequency of the second clock becomes identical to a frequency of the first clock, a phase comparison unit configured to compare a phase of the first clock with that of a clock outputted from the frequency conversion unit, and output a comparison signal corresponding to the comparison result, a logic level change unit configured to change a logic level of a training information signal when a logic level of the comparison signal is fixed for a given time after being changed, and a signal transfer unit configured to transfer the training information signal to the external.

Semiconductor memory device

A semiconductor memory device includes: a pre-amplifying unit configured to amplify a difference between an input signal and a reference signal to output a pre-output signal; a delaying unit configured to delay the input signal to output a delayed input signal; and a main amplifying unit configured to receive the pre-output signal and the delayed input signal as differential inputs to output an output signal.

Semiconductor memory device with two-stage input buffer

A semiconductor memory device includes at least one data transmission block including data I/O pads arranged in a major-axis side of the semiconductor memory device; a command and address transmission block including address and command input pads arranged in at least one minor-axis side of the semiconductor memory device; a global line block, arranged in a center of the semiconductor memory device, for transmitting inputted command and address; and at least one bank area, arranged between the global line block and the data transmission block, each bank area containing plural data I/O blocks located in a side of the data transmission block and plural control blocks located in a side of the global line block.

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Kyoungki-do, South Korea

Yong-Suk Joo