Samsung Display Co., Ltd.

Electronics and Telecommunications Research Institute

Samsung Electronics Co., Ltd.

Kt Corporation

Sk Telecom Company, Ltd.

Hanaro Telecom., Inc.

Ktfreetel Co., Ltd

Yong-Su Lee

Yoon-Ho Khang

Se-Hwan Yu

Youn-Ok Park

Su-Hyoung Kang

Sang-ho Park

Chong Sup Chang

Yoon Ho Khang

Se Hwan Yu

Min-Jung Lee

Myoung-Geun Cha

Hyun-Jae Na

Dong-Hoon Lee

Sang Ho Park

Do-Hyun Kim

Cheol Kyu Kim

Jung Kyu Lee

Dong Jo Kim

Sung Haeng Cho

Dong-Jo Kim

Young-Jo Bang

Dong-Hwan Shim

Dae-Ho Kim

Jun-Woo Kim

Sung-Hee Kim

Dae-Geun Park

Cheol-Hye Cho

Young-Il Kim

Sun-Sim Chun

Ji-Seon Lee

Chong-Sup Chang

Young-Soo Park

Yeon-Joon Chung

Hyang-Shik Kong

Seung-Chan Bang

Sang-Gab Kim

Dae-Young Lee

Won Geun Ryu

Young-il Kim

Min Hyuck Kang

Cheol-Gon Lee

Gug-Rae Jo

Sang-Ho Park

Doo-Hee Jung

Jung-Hoon Oh

Jung-Kyu Lee

Kyung-Yeol Sohn

Sang-Woo Whangbo

Hyung-Bin Cho

Cheol-Kyu Kim

Kwang-Young Choi

Su-Chang Chae

Jae-Neung Kim

Jung-Pil Choi

Eon-Young Hong

Jae-Gun Jung

Yoon-ho Khang

Jong-Chan Lee

Young-Ki Shin

Eui-Hoon Jeong

Ik-Soo Jin

Jin-Young Shim

A thin film transistor substrate includes a base substrate, an active pattern disposed on the base substrate, a gate insulation pattern disposed on the active pattern, a gate electrode disposed on the gate insulation pattern and overlapping the channel, and a light-blocking pattern disposed between the base substrate and the active pattern and having a size greater than the active pattern. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode.

Thin film transistor substrate and method of manufacturing the same

A thin film transistor including a gate electrode, a semiconductor layer, a gate insulating layer, a source electrode, a drain electrode and a graphene pattern. The semiconductor layer overlaps with the gate electrode. The gate insulating layer is disposed between the gate electrode and the semiconductor layer. The source electrode overlaps with the semiconductor layer. The drain electrode overlaps with the semiconductor layer. The drain electrode is spaced apart from the source electrode. The graphene pattern is disposed between the semiconductor layer and at least one of the source electrode and the drain electrode.

Thin film transistor and method of manufacturing the same

A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Thin film transistor array panel and manufacturing method thereof

A thin film transistor substrate includes the following elements: a base substrate, a data line disposed on the base substrate, a source electrode contacting the data line, a drain electrode spaced from the source electrode, a channel disposed between the source electrode and the drain electrode, a pixel electrode electrically connected to the drain electrode, a gate insulation pattern disposed on the channel, and a gate electrode disposed on the gate insulation pattern.

Thin-film transistor substrate and method of manufacturing the thin-film transistor substrate

A lenticular unit includes a transparent substrate; first electrodes being transparent and disposed on the substrate; a second electrode being transparent and elastic; and a transparent material layer interposed between the first and second electrodes and being deformable in a lens shape in a thickness direction depending on a potential applied between the first and second electrodes.

Lenticular unit for two-dimensional/three-dimensional auto-stereoscopic display

A thin film transistor includes a bottom gate electrode, a top gate electrode and an active pattern. The top gate electrode includes a transparent conductive material and overlaps with the bottom gate electrode. A boundary of the bottom gate electrode and a boundary of the top gate electrode are coincident with each other in a cross-sectional view. The active pattern includes a source portion, a drain portion and a channel portion disposed between the source portion and the drain portion. The channel portion overlaps with the bottom gate electrode and the top gate electrode.

Thin film transistor, display panel having the same and method of manufacturing the same

A method of forming a conductive pattern includes forming a trench on a substrate, and providing a conductive ink to the trench while an electric field is generated between the substrate and a nozzle which ejects the conductive ink.

Method of forming a conductive pattern, method of manufacturing a display substrate using the method, and display substrate

A thin film transistor display panel includes: a gate electrode, a source electrode and a drain electrode which are included in a thin film transistor on a substrate; a data line connected to the source electrode; a pixel link member connecting the drain electrode to a pixel electrode; and a gate pad connected to the gate electrode through a gate line and including a first gate subpad, a second gate subpad and a gate pad link member, in which the pixel link member and the gate pad link member are substantially same in thickness.

Thin film transistor display panel and method of manufacturing the same

Provided is a thin film transistor array panel. The thin film transistor array panel according to exemplary embodiments of the present invention includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

A display substrate includes a base substrate, a data line disposed on the base substrate, a gate line crossing the data line, a first insulation layer disposed on the base substrate, an active pattern disposed on the first insulation layer and comprising a channel comprising an oxide semiconductor, a source electrode connected to the channel, and a drain electrode connected to the channel, a second insulation layer disposed on the active pattern, and contacting to the source electrode and the drain electrode, a gate electrode disposed on the second insulation layer, and overlapping with the channel, a passivation layer disposed on the gate electrode and the second insulation layer, and a pixel electrode electrically connected to the drain electrode through a first contact hole formed through the passivation layer and the second insulation layer.

Display substrate and method of manufacturing the same

A display substrate includes a base substrate, a switching element, a gate line, a data line and a pixel electrode. Each of the gate line and the data line includes a first metal layer, and a second metal layer directly on the first metal layer. The switching element is on the base substrate, and includes a control electrode and an input electrode or an output electrode. The control electrode includes the first metal layer and excludes the second metal layer, and extends from the gate line. The input electrode or the output electrode includes a second metal layer and excludes the first metal layer. The input electrode extends from the data line. The pixel electrode is electrically connected to the output electrode of the switching element through a first contact hole, and includes a transparent conductive layer.

A technology is provided capable of improving the efficiency of an OFDM system by obtaining the performance in Bit Error Rate (BER) in a wireless communication using OFDM and determining the minimum FFT input bit that produces a SNR difference of 0.1 dB or below with respect to a theoretical BER graph at a desired performance.

Receiving apparatus and method for providing input bits of fast fourier transformer according to modulation

Growing community of inventors

Hwaseong-si, South Korea

Yong-Su Lee