Dongbu Electronics, Co. Ltd.

Dongbu Anam Semiconductor, Inc.

Dongbu Hitek Co., Ltd.

Db Hitek Co., Ltd.

Yong Soo Cho

A semiconductor device includes a high resistivity substrate, a transistor formed on the high resistivity substrate, and a deep trench device isolation region formed in the high resistivity substrate to surround the transistor. Particularly, the high resistivity substrate has a first conductive type, and a deep well region having a second conductive type is formed in the high resistivity substrate. Further, a low concentration well region having the first conductive type is formed on the deep well region, and the transistor is formed on the low concentration well region.

Semiconductor device and radio frequency module formed on high resistivity substrate

A semiconductor device includes a high resistivity substrate, a first deep well region having a first conductive type and formed in the high resistivity substrate, a second deep well region having a second conductive type and formed on the first deep well region, a first well region having the first conductive type and formed on the second deep well region, and a transistor formed on the first well region.

In embodiments, a semiconductor device includes a high resistivity substrate, a transistor disposed on the high resistivity substrate, and a deep trench device isolation region disposed in the high resistivity substrate to surround the transistor. Particularly, the high resistivity substrate has a first conductive type, and a deep well region having a second conductive type is disposed in the high resistivity substrate. Further, a first well region having the first conductive type is disposed on the deep well region, and the transistor is disposed on the first well region.

In embodiments, a radio frequency (RF) module includes an RF switching device, an RF active device, a passive device and a control device formed on a high resistivity substrate. The passive device can include a shallow trench device isolation region having a plate shape and formed at a surface portion of the high resistivity substrate, deep trench device isolation regions extending downward from a lower surface of the shallow trench device isolation region so as to define at least one isolated region therebetween, at least one insulating layer formed on the high resistivity substrate, and at least one passive component formed on the insulating layer.

Passive device and radio frequency module formed on high resistivity substrate

There are provided a MOSFET and a method for fabricating the same. The MOSFET includes a semiconductor substrate, a first epitaxial layer in a predetermined location of the semiconductor substrate, a second epitaxial layer doped with high concentration impurity ions on the first epitaxial layer, a gate structure on the second epitaxial layer, and source/drain regions with lightly doped drain (LDD) regions. The first epitaxial layer supplies carriers to the second epitaxial layer so that short channel effects are reduced.

Metal oxide semiconductor field effect transistor and method of fabricating the same

There are provided a method for fabricating a MOSFET. The method includes: substrate, forming a semiconductor substrate, a germanium layer by implanting germanium (Ge) ions into a semiconductor substrate, forming an epitaxial layer doped with high concentration impurities over the germanium layer, forming a gate structure on the epitaxial layer, and forming source/drain regions with lightly doped drain (LDD) regions in the semiconductor substrate. The germanium layer supplies carriers into the epitaxial layer so that short channel effects are reduced.

Method of fabricating metal oxide semiconductor field effect transistor

A metal oxide semiconductor field effect transistor (MOSFET) is disclosed. The MOSFET includes a semiconductor substrate, a germanium layer formed by implanting germanium (Ge) ions into the semiconductor substrate, an epitaxial layer doped with high concentration impurities over the germanium layer, a gate structure on the epitaxial layer, and source/drain regions with lightly doped drain (LDD) regions in the semiconductor substrate. The germanium layer supplies carriers into the epitaxial layer so that short channel effects are reduced.

Metal oxide semiconductor field effect transistor

A method of fabricating a gate electrode of a semiconductor device is disclosed. A disclosed method comprises growing a silicon epitaxial layer on a silicon substrate; making at least one trench through the epitaxial layer and filling the trench with a first oxide layer; etching the first oxide layer to form reverse spacers in the trench; depositing a second oxide layer and a polysilicon layer over the silicon substrate including the trench and the reverse spacers and forming a gate; implanting ions in the silicon substrate at both sides of the gate to form pocket-well and LDD areas; depositing a nitride layer over the silicon substrate including the gate and etching the nitride layer to form spacers; implanting ions using the spacers and the gate as a mask to make a source/drain region; and forming a silicide layer on the top of the gate electrode and the silicon epitaxial layer positioned on the source/drain region.

Method of fabricating gate electrode of semiconductor device

Transistors and methods of fabricating transistors are disclosed. A disclosed method comprises forming an inversion epitaxial layer on a silicon substrate; forming a hard mask on the inversion epitaxial layer; depositing a silicon epitaxial layer over the inversion epitaxial layer; forming a trench through the silicon epitaxial layer by removing the hard mask; forming reverse spacers on the sidewalls of the trench by filling the trench with an insulating layer and etching the insulating layer; forming a gate electrode over the reverse spacers; forming pocket-well regions and LDD regions in the silicon substrate by performing ion implantations; forming spacers on the sidewalls of the gate electrode; forming source and drain regions in the silicon substrate by performing an ion implantation; and forming a silicide layer on the gate electrode and the source and drain regions.

Transistors of semiconductor devices and methods of fabricating the same

The present invention relates to a method of manufacturing a semiconductor device. According to the present invention, a sidewall layer containing impurities is formed on a part of gate electrode, thereby forming a low concentration source/drain electrode for a lightly doped drain (LDD) structure not by conventional ion implanting process but by out diffusion of impurities contained in the sidewall. Thus, it is made possible to minimizes damages of substrate due to ion implanting process, since the number of process of ion implantation may be naturally minimized through the above mentioned ion implantation process according to the present invention. Also, it is made possible for gate electrode to maintain its size independently, regardless of distance between source electrode and drain electrode, by excluding a role of ion implanting mask which has been performed by gate electrode.

Method of manufacturing a semiconductor device

The present invention relates to a method of manufacturing a semiconductor device. According to the present invention, a passivation layer is temporarily formed on semiconductor substrate and a process of implanting impurities is conducted by the passivation layer as a protection mask, thereby inducing damages of substrate due to ion implantation processes to be minimized. According to the present invention, implantation of impurities depends on thickness of the passivation layer, so that it is made possible to freely control impurity implantation by controlling thickness of passivation layer. Therefore, it is made possible to control a diffusion range of the lightly doped source/drain electrode.

Growing community of inventors

Daejeon, South Korea

Yong Soo Cho