Samsung Electro-mechanics Co., Ltd.

University of Seoul Industry Cooperation Foundation

Samsung Electronics Co., Ltd.

Industry-university Cooperation Foundation Hanyang University

Yong Seong Roh

Chang Sik Yoo

Young Jin Moon

Joong Ho Choi

Yu Jin Jang

Jeong Mo Yang

Jae Shin Lee

Hwan Chul Cho

Jeong Pyo Park

Sang Wook Kwon

Nam Yun Kim

Ki Young Kim

Yun Kwon Park

Jin Sung Choi

Dong Zo Kim

Jung Chul Gong

Young Ho Ryu

Eun Seok Park

Young Tack Hong

Chang Wook Yoon

Keum Su Song

Seong Joong Kim

Changsik Yoo

Jung Sun Kwon

Joon Youp Sung

Hyun Seok Nam

Jeong Woon Kong

Yung Jin Moon

Jin Gyu Kang

Ho Joon Jang

A power management integrated circuit including: a clock generator that generates an input clock; a first phase delay controller that delays the input clock by a first phase and outputs a first supply clock to a first switching converter; a second phase delay controller that delays the input clock by a second phase and outputs a second supply clock to a second switching converter; and a third phase delay controller that delays the input clock by a third phase and outputs a third supply clock to a third switching converter, wherein the first phase, the second phase and the third phase have different phases from each other.

Power management integrated circuit

An apparatus and a method for wireless power reception are provided. A wireless power receiver includes a receiving unit configured to wirelessly receive a power. The wireless power receiver further includes a power consuming unit configured to consume the power, until a voltage applied to a load reaches a predetermined value, so that an amount of a power transferred from the receiving unit to the load is less than or equal to an initial accommodation power amount of the load.

Apparatus and method for wireless power reception

An active rectifier and a wireless power receiver including the active rectifier are provided. According to an aspect, an active rectifier may include: a first loop configured to provide voltage when the phase of an input signal is positive; and a second loop configured to provide voltage when the phase of the input signal is negative, wherein the first loop and the second loop include a delay locked loop configured to compensate for reverse current leakage due to a delay of a switch included therein.

Active rectifier with delay locked loop to compensate for reverse current leakage and wireless power receiving apparatus including active rectifier with delay locked loop to compensate for reverse current leakage

There are provided a phase shift circuit and a power factor correction circuit including the same. The phase shift circuit includes a switching circuit unit charging power in or discharging power from a capacitor through a plurality of switching devices and comparing a voltage of the capacitor with a predetermined reference voltage, and a clock generating unit generating a reference clock signal based on an output of the switching circuit unit, wherein the switching circuit unit turns the plurality of switching devices on or off, based on currents from inductors respectively included in a main circuit and a sub-circuit of a power factor correction circuit to determine a polarity of the voltage of the capacitor.

Phase shift circuit and power factor correction circuit including the same

A phase shift circuit may include a ramp generation unit charging or discharging a capacitor connected to a switch device to generate a ramp signal, a reference signal generation unit generating a predetermined reference signal from the ramp signal, and a comparison unit comparing the ramp signal with the reference signal to generate a clock signal, wherein at least one of the reference signal generation unit and the comparison unit changes a negative or positive value of offset components included in the reference signal or the ramp signal within every operating period of the switch device.

There is provided a power factor correction circuit including: a power conversion circuit unit controlling an inductor current according to a switching signal applied to a main switch to convert an external input voltage into an output voltage having a predetermined range; an imbalance detection circuit outputting an imbalance state signal when the external input voltage is in an unbalanced state by using the inductor current; and a soft start circuit unit performing soft starting by adjusting the switching signal when the imbalance state signal is output by the imbalance detection circuit unit.

Power factor correction circuit

The present invention relates to an IC circuit. In an embodiment, an IC circuit includes: an RT terminal connected to an external; a current mirroring unit conducting a channel current between internal voltage power and the RT terminal and generating an internal reference current mirrored with the channel current; a negative feedback unit receiving the internal reference current, equalizing voltages of an RT terminal connection terminal and an internal reference current output terminal of the current mirroring unit to make the internal reference current constant, and providing the internal reference current inside the IC circuit; and an IC state indicating unit having a transistor, which operates complementarily with the current mirroring unit, connected between the RT terminal and a ground and providing the state of an IC or a system to the RT terminal by being linked with the complementary operation of the current mirroring unit.

IC circuit

There is provided a power factor correction circuit capable of correcting a power factor of a power converting module through increasing an input current by switching a main switching element of a power converting module on the basis of a first reference wave having a slope based on a first signal and an error voltage, in particular, by limiting a switching frequency on the basis of a first reference wave having a slope based on a second signal lower than a first signal and an error voltage when the switching frequency of the main switching element increases because an input voltage of the power converting module is low.

Power factor correction circuit for correcting power factor

A relaxation oscillator includes a ramp wave generator configured to generate a ramp wave by complementary first capacitor module charged and discharged according to a first switching signal and second capacitor module charged and discharged according to a second switching signal, a negative feedback circuit unit configured to generate a compensation voltage for compensating an error between the ramp wave and a reference voltage through a feedback of the ramp wave, and a switching signal generator configured to generate the first switching signal and the second switching signal from the compensation voltage and the ramp wave, including a peak voltage storage unit configured to store a peak voltage of the ramp wave that is controlled to be equal to the reference voltage based on the compensation voltage and a peak voltage transfer unit configured to transfer the peak voltage of the ramp wave to the negative feedback unit.

Relaxation oscillator

Growing community of inventors

Incheon, South Korea

Yong Seong Roh