Stmicroelectronics (shenzhen) R&d Co. Ltd.

Other

Yong Liu

Robert Lee

Fangming Cao

Wiring arrangement at wall edges and corners with decorative effect, having at least two elongated wire guiding strips; each wire guiding strip is positioned at a wall edge between a wall and a floor or a wall edge between two adjacent walls; each wall edge between the wall and the floor or each wall edge between two adjacent walls is provided with only one of the wire guiding strips; a corner connector is provided between two ends of two adjacent wire guiding strips to achieve electrical connection and a change in direction of the wiring arrangement; the corner connector has two legs electrically connected to two ends of the two adjacent wire guiding strips respectively; each of the wire guiding strips has a soft PVC wrapping layer and wires wrapped inside. The wiring arrangement has a reasonable structure and is safe and aesthetically pleasing.

Wiring arrangement at wall edges and corners with decorative effect

A Schmitt trigger circuit having an input coupled to a current summing junction. A trickle current source generates a trickle current applied to the current summing junction. A bandgap current source generates a bandgap current applied to the current summing junction (wherein the bandgap current is fixed when a supply voltage exceeds a threshold). A variable current source generates a variable current applied to the current summing junction (wherein the variable current varies dependent on the supply voltage). At the current summing junction, the variable current is offset against the trickle and bandgap currents with respect to generating a voltage that is sensed at the Schmitt trigger circuit input.

Power on reset (POR) circuit with current offset to generate reset signal

A voltage regulator includes a feedback regulation loop and a drive transistor configured to source current to a regulated output. A transient recovery circuit is coupled to the voltage regulator circuit and includes a first transistor coupled to source current into a control terminal of the drive transistor, wherein the source current is in addition to current sourced in response to operation of the feedback regulation loop. The first transistor is selectively actuated in response to a drop in voltage at the regulated output. The transient recovery circuit further includes a second transistor coupled to sink current from the regulated output. The sink current has a first non-zero magnitude in the quiescent operating mode of the regulator circuit. In response to an increase in voltage at the regulated output, the operation of the second transistor is modified to increase the sink current to a second, greater, non-zero magnitude.

LDO regulator with improved load transient performance for internal power supply

Power on reset (POR) circuit

An electronic device includes a first circuit to generate an output control signal when a first voltage across a first capacitor receiving an input current exceeds a threshold voltage, in response to an input signal having a first logic level. The input current is proportional to a frequency of the input signal. A second circuit is to generate an output reset signal when a second voltage across a second capacitor receiving the input current exceeds the threshold voltage, in response to the input signal having a second logic level. A flip flop is to generate a signal output as having the first logic level in response to the output control signal, and to reset and generate the signal output as having the second logic level in response to the output reset signal.

Clock phase shift circuit

A reference current path carries a reference current. A first transistor is coupled to the reference current path. A second transistor is also coupled to the reference current path. The first and second transistors are connected in parallel to carry the reference current. The first transistor is biased by a first voltage (which is a bandgap voltage plus a threshold voltage). The second transistor is biased by a second voltage (which is a PTAT voltage plus a threshold voltage). The first and second transistors are thus biased by voltages having different and opposite temperature coefficients with a result that the temperature coefficients of the currents flowing in the first and second transistors are opposite and the reference current accordingly has a low temperature coefficient.

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Shenzhen, China

Yong Liu