International Rectifier Corporation

Yong Li

Toshio Takahashi

Jun Honda

Eddy Ying Yin Ho

David C Tam

Toshi Takahashi

A motor drive system control provides global closed loop feedback to cooperatively operate system components to adaptively reduce noise and provide noise cancellation feedback. An active EMI filter reduces differential and common mode noise on an input and provides a noise level indication to a system controller. Power switches in both a power converter and power inverter are cooperatively controlled with dynamic dv/dt control to reduce switching noise according to a profile specified by the controller. The dv/dt control is provided as an analog signal to a high voltage IC and codified as a pulse width for a level shifting circuit supplying control signals to the high voltage gate drive. A noise extraction circuit and technique obtain fast noise sampling to permit noise cancellation and adaptive noise reduction.

Global closed loop control system with DV/DT control and EMI/switching loss reduction

A circuit for providing power factor correction in accordance with an embodiment of the present application may include a boost converter circuit and a control circuit receiving as inputs a rectified AC input voltage from a rectifier, a signal proportional to current through the boost inductor and the DC bus voltage across the capacitor of the boost converter. The control circuit provides a pulse width modulated signal to control the on time of a PFC switch. The control circuit further includes a voltage regulator and a current regulator. The current regulator includes a difference device operable to subtract a signal proportional to the inductor current from the current reference signal, a PI controller adapted to receive the output of the difference device and provide a first control signal, a feed forward device operable to receive the rectified AC input voltage and to provide a second control signal with a smaller dynamic range than the AC input voltage, and an adder operable to add the first control signal to the second control signal to provide a PWM reference signal for generating the pulse width modulated signal. A zero crossing detector and vector rotator may be provided to provide a clean sinusoidal reference to the current regulator. A partial PFC regulator may be provide to provide partial mode PFC if desired.

Digital implementation of power factor correction

A gate driver for a power switch, comprising a gate drive circuit coupled to the gate of the power switch for at least one of turning on and turning off the power switch; a gate voltage control circuit in the gate drive circuit for controlling a voltage applied to the gate of the power switch during at least one of turning on and turning off the power switch; and a signal supplied to the gate voltage control circuit indicative of a voltage rate of change per unit time to be applied in at least one of turning on and turning off the power switch.

A circuit for providing power factor correction includes a bridgeless boost converter circuit and a control circuit receiving an input AC line voltage of the bridgeless boost converter circuit, wherein the control circuit provides a pulse width modulated signal to control the on time of a PFC switch of the bridgeless boost converter circuit. The control circuit also includes a scaling device operable to scale down a bi-polar AC voltage of the input AC line voltage to a uni-polar AC voltage, an analog to digital converter operable to convert the uni-polar AC voltage into digital data and a digital rectifier operable to process the digital data of the uni-polar AC voltage to provide a half-sinusoidal AC signal that is proportional to and in phase with the input AC line voltage for use in providing the pulse width modulated signal.

Digital control of bridgeless power factor correction circuit

A power inverter control adjusts input power to track with output power to reduce energy handling requirements for an inverter DC bus. Input power to the power inverter circuit is measured and compared with a measurement of inverter output power. The comparison result is applied to a power factor correction circuit to adjust input power to track with output power, while obtaining a good power factor for the power inverter circuit. The energy requirements and ripple voltages or ripple currents on the DC bus are reduced, leading to a reduction in rating specifications for passive energy storage elements on the DC bus.

Power transfer system with reduced component ratings

A circuit for providing power factor correction includes a boost converter circuit with a boost inductance and a power factor correction switch and a control circuit. The control circuit provides a pulse width modulated signal to control the on time of a PFC switch, and also includes a power factor correction pulse width modulated device receiving as inputs a rectified AC input voltage, a DC bus voltage, a signal proportional to the current through the inductor and a reference current signal. The power factor correction pulse width modulated device also includes a pulse width modulated generator operable to provide the pulse width modulated signal to control the on time of the PFC circuit and a pulse width modulated blanking device operable to provide an enable/disable signal to disable the pulse width modulated generator when predetermined conditions are met.

High frequency partial boost power factor correction control circuit and method

A circuit for providing power factor correction comprising a boost converter circuit having a boost inductance and a power factor correction switch coupled in series with the boost inductance, the boost inductance and power factor correction switch being coupled across the output of a rectifier being supplied with AC power from an AC line, the boost converter circuit further comprising a boost diode coupled to a junction between the inductor and the switch, an output of the boost diode coupled to an output capacitor, a DC bus voltage being provided across the output capacitor, further comprising a control circuit receiving as inputs a rectified AC input voltage from the rectifier, a signal proportional to current through the inductor and the DC bus voltage across the capacitor, and wherein the control circuit provides a pulse width modulated signal to control the on time of the PFC switch, further comprising an enable/disable circuit receiving as inputs the rectified AC input voltage and the DC bus voltage, the circuit instantaneously comparing the rectified AC input voltage and the DC bus voltage and controlling the control circuit whereby the control circuit provides the pulse width modulated signal to control the PFC switch when the rectified AC input voltage is less than the DC bus voltage and disables the generation of the pulse width modulated signal to the PFC switch when the rectified AC input voltage is greater than DC bus voltage.

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Torrance, CA, United States of America

Yong Li