Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Seagate Technology International

Yong Kwan Kim

Jungwoo Song

Kwangmin Kim

Yoosang Hwang

Sangyeon Han

Jin A Kim

Ji Young Kim

Keunnam Kim

Sun Young Lee

Myeong-Dong Lee

Jimin Choi

Ki-Hyung Nam

Changhyun Cho

Chang Hyun Cho

Dongryul Lee

Pulunsol Cho

Minseong Choi

Hyuckjin Kang

Seguen Park

Jiyoung Kim

Jun Ho Lee

Jaekyu Lee

Kwangtae Hwang

Sanghyun Hong

Ye-Ro Lee

Hirotsugu Kishimoto

Seung-bum Hong

Chul Ho Jeong

Ju-Hwan Jung

Kyu Young Kim

Hyun Jae Na

Sung-hoon Choa

Hyoung-soo Ko

Jemin Park

Chan Ho Park

Eunjung Kim

Han Sun Ryou

Youngnam Hwang

Yoonjong Song

Sung Guk An

Semyeong Jang

Shinhee Han

Daeeun Jeong

Hyun Jun Cho

Seok Won Jang

Yong Hyuck Lee

Soh Ra Han

Du Chang Heo

Jung Kee Lee

A display device includes a display panel including a first non-folding area, a second non-folding area, and a folding area that are arranged along a first direction, the folding area being foldable along a folding line extending along a second direction intersecting the first direction, a panel lower member disposed below the display panel, and a digitizer disposed below the panel lower member and including a base layer and sensing coils. The base layer includes a folding portion including holes overlapping the folding area of the display panel and first and second non-folding portions disposed along the first direction. The folding portion is disposed between the first and second non-folding portions. The sensing coils are disposed on the base layer, and the base layer includes a matrix including a filler and an elastomer and weaving-shaped fiber lines disposed inside the matrix and alternately arranged with each other.

Digitizer and display device including the same

A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

Semiconductor device and method of fabricating the same

A semiconductor device including a substrate includes an active region. A bit line structure extends across the active region. A landing pad is disposed on an end portion of the active region. A first spacer is disposed between the bit line structure and the landing pad. A second spacer is disposed between the first spacer and the landing pad. An air spacer is disposed between the first spacer and the second spacer. A capping pattern is disposed between a sidewall of the landing pad and a sidewall of the bit line structure. The capping pattern defines a top surface of the air spacer and comprises a metallic material.

Semiconductor memory device

A display device includes a display panel having a front surface where images are displayed; a rear-side layer disposed on a rear surface of the display panel, including a plurality of conductive patterns and having first surface unevenness on a front surface thereof; and a support plate disposed between the display panel and the rear-side layer and having a flat surface on a front surface thereof. The support plate includes glass or ceramic.

Display device having a support plate

Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

Semiconductor memory device and method of fabricating the same

According to some embodiments, a semiconductor device may include gate structures on a substrate; first and second impurity regions formed in the substrate and at both sides of each of the gate structures; conductive line structures provided to cross the gate structures and connected to the first impurity regions; and contact plugs connected to the second impurity regions, respectively. For each of the conductive line structures, the semiconductor device may include a first air spacer provided on a sidewall of the conductive line structure; a first material spacer provided between the conductive line structure and the first air spacer; and an insulating pattern provided on the air spacer. The insulating pattern may include a first portion and a second portion, and the second portion may have a depth greater than that of the first portion and defines a top surface of the air spacer.

Semiconductor devices and methods of fabricating the same

Semiconductor memory device having capping pattern defining top surface of air gap

Provided are a magnetic memory device and a method of fabricating the same. The device may include a cell selection device, a magnetic tunnel junction (MTJ), and a lower electrode connecting them. The lower electrode may include a vertical portion and a horizontal portion laterally extending from a side surface of the vertical portion. In the lower electrode, the vertical portion has a top surface higher than the horizontal portion and has a top surface including at least two parallel sides and other side at an angle thereto. The MTJ may be provided on the vertical portion of the lower electrode.

Magnetic memory device and method of fabricating the same

The present inventive concepts provide methods for fabricating semiconductor devices. The method may comprise providing a substrate, stacking a conductive layer and a lower mask layer on the substrate, forming a plurality of hardmask layers each having an island shape on the lower mask layer, forming a plurality of upper mask patterns having island shapes arranged to expose portions of the lower mask layer, etching the exposed portions of the lower mask layer to expose portions of the conductive layer, and etching the exposed portions of the conductive layer to form a plurality of contact holes each exposing a portion of the substrate.

Methods for fabricating semiconductor devices

Growing community of inventors

Yongin-si, South Korea

Yong Kwan Kim