Skhynix Inc.

Lg Innotek Co., Ltd.

Lg Electronics Inc.

Samsung Electronics Co., Ltd.

Youlchon Chemical Co., Ltd.

Korea Institute of Science and Technology

Lg Philips Lcd Co., Inc.

Seoul National University

Lg Cns Co., Ltd.

Lg Display Co., Ltd.

Dongwoo Fine-chem Co., Ltd.

Korea Food Research Institute

Korea Institute of Ceramic Engineering and Technology

Huvitz Co., Ltd.

I-sens, Inc.

Yong Kim

Sang Hyun Sung

So Young Lee

Sung June Kim

Jonghee Han

Sung Min Kim

Sung Lae Oh

Beom Jin Jeon

Min Soo Lee

Kyung Sang Park

Seong Jin Kim

Chang Hyun Park

Woo Seob Shim

Young Ki Kim

Jeong Hwan Kim

Chang Woon Choi

Hyoung-Juhn Kim

Jung Hwan Kim

Tae Sung Park

Hi Chan Moon

Sang Woo Park

Yong Sik Kim

Minji Kim

Do Yeon Kim

Tae Yoon Kim

Jong Hyun Jang

Jae Ho Kim

Soo Young Oh

Yun Ki Lee

Jin Ho Kim

Hyun Kyung Kim

Young Jun Cho

Bum Suk Kim

Dong Kyu Lee

Jin Won Lee

Ki Hyun Jeong

Soo Nam Jung

Jung-Saeng Kim

Hyun Jung Park

Sung Wook Choi

Jun Sung Park

Soon Hyun Cha

Yong Jin Cho

Bohyun Kim

Ha Na Lee

Chang Oh Kim

Sung Ho Lee

Chang Man Son

Bo Sung Seo

Hyuck Joo Kwon

Bong Ok Kim

Byung Hyun Jeon

Jung Su Han

Sun-Hee Choi

Jung Woo Jo

Chae Man Lim

Seung Ha Oh

Hee Sik Han

Byung Hyun Jun

Ju Hwan Ku

Jae Seok Park

Tae Sung Lee

Chan Ho Yoon

Seung Soo Yoon

Jun Sung Lim

Jeong Hoan Park

Jong Hyub Park

Kang Hee Han

Kyou Sik Min

Han Jun Kang

Sung Eun Lee

Kwang Hwi Park

Hyuk Hwan Kwon

Suk Ho Cho

Hyo Sop Kim

Chul Jin Kim

Dong Kun Oh

Byeong Jong Yoo

Dong Ho Kang

Jeong Je Park

Jin Seub Eum

Su Jung Park

Seung Yeub Yang

Chong Tai Kim

Hyo Seon Park

Jae Chul Jung

Chae Bin Kim

Min Sung Shin

Joon Soo Jeong

Seong Ho Choi

Dong Yeol Kim

Sung Jin Eum

Kyungbae Sohn

Minsung Shin

Sung Yoon Paik

Heedae Hong

Moon Soo Kang

Beom Mo Kim

Chung Sun Lim

Hoil Lee

A three-dimensional memory device includes a first electrode structure and a second electrode structure extending in a first direction, being adjacent to each other in a second direction intersecting with the first direction, and each including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a source plate; a plurality of first slimming holes formed in the first electrode structure to expose pad regions of the electrode layers of the first electrode structure, and arranged in the first direction; and a plurality of second slimming holes formed in the second electrode structure to expose pad regions of the electrode layers of the second electrode structure, and arranged in the first direction, wherein a first slimming hole and a second slimming hole which are adjacent in the second direction have different depths.

Three-dimensional memory device

A memory device includes a first semiconductor structure including pass transistors defined in a row decoder region of a substrate, a first bonding layer including first bonding pads, and bottom wiring layers disposed between the substrate and the first bonding layer; a second semiconductor structure including a second bonding layer including second bonding pads bonded to the first bonding pads, a memory cell array, and a top wiring layer disposed between the second bonding layer and the memory cell array; and global lines disposed in the row decoder region, and configured to transfer operating voltages to the pass transistors, wherein the bottom wiring layers include bottom wiring layers of a first tier and bottom wiring layers of a second tier disposed over the bottom wiring layers of the first tier, and the global lines are disposed in at least one of the bottom wiring layers of the first tier.

Memory device including row decoder

The present invention relates to a collection apparatus for collecting particulate matter generated due to friction between a rotor and a brake pad in a brake system of a transport facility, the collection apparatus including a first collector configured to surround a portion of an outer side surface of the rotor, an upper collector configured to surround a portion of an outer peripheral surface of the rotor, and a second collector configured to surround a portion of an inner side surface of the rotor, wherein the first collector and the second collector are made of porous ceramic foam. According to the present invention, particulate matter generated due to friction between a rotor and a brake pad in a brake system of a transport facility can be efficiently collected, and by reducing the amount of particulate matter generated when braking a transport facility, air pollution can be prevented.

Collection apparatus for collecting particulate matter generated in brake system of transport facility

The present invention may provide a motor including a stator, a shaft having a hollow and disposed inside the stator, and a magnet disposed on an outer circumferential surface of the shaft, wherein the shaft includes protrusions in contact with the magnet, and the protrusions include first faces protruding from the outer circumferential surface of the shaft and second faces concavely disposed in an inner circumferential surface of the shaft.

Motor

An image sensor in which a shading phenomenon is decreased and the quality is increased is provided. The image sensor includes a light-receiving region including a plurality of unit pixels. The image sensor further includes a first region with unit pixels adjacent to a center of the light-receiving region, and a second region with the unit pixels spaced apart from the center of the light-receiving region. In both regions, a plurality of color filters corresponding to the plurality of unit pixels is disposed on a first face of the substrate, as well as a grid pattern interposed between the plurality of color filters defining boundaries between the unit pixels. A width of the grid pattern in the second region is greater than a width of the grid pattern in the first region, thereby adjusting light receiving areas near the edge of the image sensor to correct for a shading phenomenon.

Image sensor with varying grid width

A semiconductor memory device includes a memory cell array disposed over a substrate extending in a first direction and a second direction intersecting with the first direction in a first semiconductor layer, and including a plurality of cell units and at least two via regions that are arranged in the second direction, wherein a width of each of the at least two via regions in the second direction is a multiple of a width of each of the plurality of cell units in the second direction.

Semiconductor memory device having cell units and via regions with a different width

A memory device includes a pass transistor circuit included in a first wafer, and configured to transfer an operating voltage to row lines of a memory cell array; and a discharge transistor circuit included in a second wafer that overlaps with the first wafer in a vertical direction, and configured to transfer a discharge voltage to at least one of the row lines.

Memory device including a pass transistor circuit and a discharge transistor circuit

A memory device includes a substrate defined with a first cell region and a second cell region, and a row decoder region between the first and second cell regions; a peripheral circuit defined in the first and second cell regions of the substrate; pass transistors defined in the row decoder region of the substrate; bottom wiring layers disposed in a first dielectric layer covering the peripheral circuit and the pass transistors; a memory cell array defined on the first dielectric layer; a second dielectric layer defined on the first dielectric layer, and covering the memory cell array; top wiring layers disposed in a third dielectric layer defined on the second dielectric layer; and global lines disposed in the row decoder region, and configured to transfer operating voltages to the pass transistors, wherein the global lines are disposed only in at least one bottom wiring layer from among the bottom and top wiring layers.

A device for mounting a leap block capable of automatically adjusting the mounting direction of the leap block comprises a block stand fixedly mounted to one end of a blocking device frame and configured to support a leap block so that the leap block is rotatable in a horizontal direction; the leap block in which a support rotatably supported by the block stand is formed in the center, and a first magnetic body is mounted in one direction; and a leap block mounting unit to which a second magnetic body that couples with the first magnetic body by magnetic force is mounted in one direction, and which rotates in the horizontal direction and couples with the leap block in a fixed direction.

Device and method for mounting leap block

A memory device includes an active region with a drain; a plurality of memory blocks arranged in a first direction; and a plurality of pass transistors formed in the active region and sharing the drain, each one of the plurality of pass transistors configured to transfer an operating voltage from the drain to a corresponding one of the plurality of memory blocks in response to a block select signal. The plurality of pass transistors is divided into first pass transistors and second pass transistors. A channel length direction of the first pass transistors and a channel length direction of the second pass transistors are different from each other.

Memory device including pass transistors

A three-dimensional memory device includes a plurality of row lines stacked alternately with a plurality of interlayer dielectric layers in a vertical direction on a substrate, and each of the plurality of row lines having a projection from a side surface thereof; and a plurality of vias extending in the vertical direction from the substrate, each coupled to the projection of a corresponding row line, and electrically coupling the plurality of row lines to a peripheral circuit defined below the substrate.

Three-dimensional memory device and manufacturing method thereof

A virtual device acquires a transaction history between a legacy computing device and a linked device; obtains a first request provided from the legacy computing device based on the transaction history and a first response received from the linked device in response to the first request; receives a second request corresponding to the first request from a new computing device and determines a second response to the second request; and provides test information for the new computing device based on a comparison of the first response and the second response.

Virtual device for providing test data

The present invention may provide a motor including a housing, a cover which covers the housing, a stator disposed inside the housing, a rotor disposed inside the stator, a rotary shaft coupled to the rotor, a bearing disposed on the cover, and a nut which is coupled to the cover and which is in contact with an outer ring of the bearing, wherein the cover incudes a first pocket accommodating the bearing and a second pocket which is disposed above the first pocket and to which the nut is rotation-coupled, the nut includes a body disposed to be lower than an upper surface of the cover and including a screw thread and an extension portion disposed to be higher than the upper surface of the cover, the body incudes a protrusion protruding outward from the screw thread, and the second pocket includes a first groove in which the protrusion is positioned.

A three-dimensional semiconductor memory device may include a cell wafer including a source plate, a plurality of first word lines stacked to be spaced apart from one another along a plurality of first vertical channels projecting from a bottom surface of the source plate in a vertical direction, and a plurality of second word lines stacked to be spaced apart from one another along a plurality of second vertical channels projecting from a top surface of the source plate in a vertical direction; a first peripheral wafer bonded to a bottom surface of the cell wafer, and including a first row decoder unit which transfers an operating voltage to the plurality of first word lines; and a second peripheral wafer bonded to a top surface of the cell wafer, and including a second row decoder unit which transfers an operating voltage to the plurality of second word lines.

Three-dimensional semiconductor memory device

A three-dimensional memory device includes an electrode structure including a plurality of electrode layers and a plurality of interlayer dielectric layers which are alternately stacked on a substrate; a first stairway structure and a second stairway structure defined in the electrode structure, and positioned at different heights from each other; a sidewall of the electrode structure formed due to a difference in height between the first stairway structure and the second stairway structure; and a dielectric support passing through the electrode structure, and isolating a corner portion of the sidewall from the plurality of electrode layers.

Growing community of inventors

Seoul, South Korea

Yong Kim