Samsung Electronics Co., Ltd.

Yong-Ho Ha

Bong-jin Kuh

Ji-Hye Yi

Jeong-Hee Park

Doo-Hwan Park

Han-Bong Ko

Jun-Soo Bae

Hee-Ju Shin

Joon-Sang Park

Sang-Wook Lim

Beak-Hyung Cho

Hyeong-Geun An

Hye-Lan Lee

Horii Hideki

Young-Soo Lim

Ju-Chul Park

Jong-Ho Lee

Seok-Jun Won

Gwan-Hyeob Koh

Ju-Youn Kim

Young-Lim Park

Jang-Eun Lee

Se-Ho Lee

Yoon-jong Song

Su-Jin Ahn

Dong-Ho Ahn

Soon-Oh Park

Sung-lae Cho

Young-Nam Hwang

Kyung-Chang Ryoo

Chang-Wook Jeong

Sang-Don Nam

Choong-Man Lee

Jun-Young Jang

Su-Youn Lee

Dong-Won Lim

Hyun-Suk Kwon

Myung-jin Kang

Gyeo-Re Lee

Wei-Hsiung Tseng

Sang-Jin Hyun

Hideki Horii

Sang-Bom Kang

In-gyu Baek

June-Hee Lee

Sung-Un Kwon

Jae-Yeol Song

Jae-Jung Kim

Moon-Kyu Park

Myung-jong Kim

A semiconductor device includes a substrate and first and second gate electrodes on the substrate. The first gate electrode includes a first gate insulation film having a bottom portion on the substrate and sidewall portions extending from the bottom portion and away from the substrate defining a first trench having a first width and a first functional film filling the first trench. The second gate electrode includes a second gate insulation film having a bottom portion on the substrate and sidewall portions extending from the bottom portion defining a second trench having a second width different from the first width, a second functional film conforming to the second gate insulation film in the second trench and defining a third trench, and a metal region in the third trench. The first width may be less than the second width.

Methods of fabricating semiconductor devices using MOS transistors with nonuniform gate electrode structures

Provided is a method for fabricating a semiconductor device. The method includes forming an interlayer insulating layer on a substrate, the interlayer insulating layer including a first trench; forming a high-k dielectric layer in the first trench; successively forming a diffusion layer and a blocking layer on the high-k dielectric layer; subsequently performing annealing; after the annealing, successively removing the blocking layer and the diffusion layer; forming a first barrier layer on the high-k dielectric layer; successively forming a work function adjustment layer and a gate conductor on the first barrier layer; and forming a capping layer on the gate conductor.

Semiconductor device and method for fabricating the same

Phase-changeable memory devices include a lower electrode electrically connected to an impurity region of a transistor in a substrate and a programming layer pattern including a first phase-changeable material on the lower electrode. An adiabatic layer pattern including a material having a lower thermal conductivity than the first phase-changeable material is on the programming layer pattern and an upper electrode is on the adiabatic layer pattern.

Methods of forming phase-changeable memory devices including an adiabatic layer

A nonvolatile memory cell includes first and second electrodes and a data storage layer extending between the first and second electrodes. An oxygen diffusion barrier layer is provided, which extends between the data storage layer and the first electrode. An oxygen gettering layer is also provided, which extends between the oxygen diffusion barrier layer and the data storage layer. The oxygen diffusion barrier layer includes aluminum oxide, the oxygen gettering layer includes titanium, the data storage layer includes a metal oxide, such as magnesium oxide, and at least one of the first and second electrodes includes a material selected from a group consisting of tungsten, polysilicon, aluminum, titanium nitride silicide and conductive nitrides.

Nonvolatile memory cells having oxygen diffusion barrier layers therein

A method of manufacturing a phase-change memory device comprises forming a contact region on a substrate, forming a lower electrode electrically connected to the contact region, forming a phase-change material layer on the lower electrode using a chalcogenide compound target including carbon and metal, or carbon, nitrogen and metal, and forming an upper electrode on the phase-change material layer.

Methods for manufacturing a phase-change memory device

A nonvolatile memory cell includes a substrate and a phase changeable pattern configured to retain a state of the memory cell, on the substrate. An electrically insulating layer is provided, which contains a first electrode therein in contact with the phase changeable pattern. The first electrode has at least one of an L-shape when viewed in cross section and an arcuate shape when viewed from a plan perspective. A lower portion of the first electrode may be ring-shaped when viewed from the plan perspective. The lower portion of the first electrode may also have a U-shaped cross-section. An upper portion of the first electrode may also have an arcuate shape that spans more than 180&#xb0; of a circular arc.

Nonvolatile memory cells having phase changeable patterns therein for data storage

A phase changeable memory unit includes a lower electrode, an insulating interlayer structure having an opening, a phase changeable material layer and an upper electrode. The lower electrode is formed on a substrate. The insulating interlayer structure has an opening and is formed on the lower electrode and the substrate. The opening exposes the lower electrode and has a width gradually decreasing downward. The phase changeable material layer fills the opening and partially covers an upper face of the insulating interlayer structure. The upper electrode is formed on the phase changeable material layer.

Method of manufacturing a phase changeable memory unit having an enhanced structure to reduce a reset current

In a method of forming a chalcogenide compound target, a first powder including germanium carbide or germanium is prepared, and a second powder including antimony carbide or antimony is prepared. A third powder including tellurium carbide or tellurium is prepared. A powder mixture is formed by mixing the first to the third powders. After a shaped is formed body by molding the powder mixture. The chalcogenide compound target is obtained by sintering the powder mixture. The chalcogenide compound target may include a chalcogenide compound that contains carbon and metal, or carbon, metal and nitrogen considering contents of carbon, metal and nitrogen, so that a phase-change material layer formed using the chalcogenide compound target may stable phase transition, enhanced crystallized temperature and increased resistance. A phase-change memory device including the phase-change material layer may have reduced set resistance and driving current while improving durability and sensing margin.

A contact structure that includes a first pattern formed on a substrate, wherein the first pattern has a recessed region in an upper surface thereof, a planarized buffer pattern formed on the first pattern, and a conductive pattern formed on the planarized buffer pattern.

Contact structure, a semiconductor device employing the same, and methods of manufacturing the same

A phase-change memory device has an oxidation barrier layer to protect against memory cell contamination or oxidation. In one embodiment, a semiconductor memory device includes a molding layer disposed over semiconductor substrate, a phase-changeable material pattern, and an oxidation barrier of electrically insulative material. The molding layer has a protrusion at its upper portion. One portion of the phase-changeable material pattern overlies the protrusion of the molding layer, and another portion of the phase-changeable material pattern extends through the protrusion. The electrically insulative material of the oxidation barrier may cover the phase-changeable material pattern and/or extend along and cover the entire area at which the protrusion of the molding layer and the portion of the phase-change material pattern disposed on the protrusion adjoin.

Semiconductor devices having phase change memory cells, electronic systems employing the same and methods of fabricating the same

A nonvolatile memory device, including a lower electrode on a semiconductor substrate, a phase change material pattern on the lower electrode, an adhesion pattern on the phase change material pattern and an upper electrode on the adhesion pattern, wherein the adhesion pattern includes a conductor including nitrogen.

Nonvolatile memory device and method of manufacturing the same

A phase-changeable memory device includes a substrate having a contact region on an upper surface thereof. An insulating interlayer on the substrate has an opening therein, and a lower electrode is formed in the opening. The lower electrode has a nitrided surface portion and is in electrical contact with the contact region of the substrate. A phase-changeable material layer pattern is on the lower electrode, and an upper electrode is on the phase-changeable material layer pattern. The insulating interlayer may have a nitrided surface portion and the phase-changeable material layer may be at least partially on the nitrided surface portion of the insulating interlayer. Methods of forming phase-changeable memory devices are also disclosed.

Methods of manufacturing phase-changeable memory devices including upper and lower electrodes

A phase-changeable memory device includes a phase-changeable material pattern and first and second electrodes electrically connected to the phase-changeable material pattern. The first and second electrodes are configured to provide an electrical signal to the phase-changeable material pattern. The phase-changeable material pattern includes a first phase-changeable material layer and a second phase-changeable material layer. The first and second phase-changeable material patterns have different chemical, physical, and/or electrical characteristics. For example, the second phase-changeable material layer may have a greater resistivity than the first phase-changeable material layer. For instance, the first phase-changeable material layer may include nitrogen at a first concentration, and the second phase-changeable material layer may include nitrogen at a second concentration that is greater than the first concentration. Related devices and fabrication methods are also discussed.

Multi-layer phase-changeable memory devices

Phase change memory devices can have bottom patterns on a substrate. Line-shaped or L-shaped bottom electrodes can be formed in contact with respective bottom patterns on a substrate and to have top surfaces defined by dimensions in x and y axes directions on the substrate. The dimension along the x-axis of the top surface of the bottom electrodes has less width than a resolution limit of a photolithography process used to fabricate the phase change memory device. Phase change patterns can be formed in contact with the top surface of the bottom electrodes to have a greater width than each of the dimensions in the x and y axes directions of the top surface of the bottom electrodes and top electrodes can be formed on the phase change patterns, wherein the line shape or the L shape represents a sectional line shape or a sectional L shape of the bottom electrodes in the x-axis direction.

Methods of forming phase change memory devices having bottom electrodes

Growing community of inventors

Gyeonggi-do, South Korea

Yong-Ho Ha