Samsung Electronics Co., Ltd.

Yong-Dae Ha

Chang-Ho Lee

Young-Sik Kim

Min-Woo Kim

Kyoung-Bok Cho

Tea-Seog Um

Seul-Ki Han

Doo-Jin Kim

Jae-Cheol Kim

Cheal-Sang Yoon

Jae-Ryoung Lee

Jeong-Soon Cho

Bum-Woo Lee

Gil-Man Kang

Pil-June Kim

A bonding apparatus includes a detecting unit configured to determine whether a bonding head and a stage, on which a package substrate is disposed, are sufficiently parallel to each other during a bonding process, wherein the bonding head is configured to bond a semiconductor chip to the package substrate, and a correcting unit configured to adjust at least one of the bonding head or the stage based on the determination of the detecting unit during the bonding process.

Apparatus for correcting a parallelism between a bonding head and a stage, and a chip bonder including the same

Semiconductor module testing equipment includes a test board, a plurality of pipe structures extending from an upper surface of the test board in a first direction and spaced apart from one another in a second direction that intersects the first direction, wherein the first and second directions are substantially parallel to a plane of the test board, at least one semiconductor module socket disposed between a pair of neighboring pipe structures of the plurality of pipe structures, and a plurality of nozzles disposed on each pipe structure of the plurality of pipe structures, wherein the plurality of nozzles is configured to discharge a fluid laterally.

Pipe structure and semiconductor module testing equipment including the same

An aligning guide, a semiconductor package comprising an aligning guide, and a method of manufacturing a semiconductor package comprising an aligning guide are provided. The semiconductor package may comprise a circuit board and an aligning guide mounted on the circuit board. The aligning guide may have a plurality of stepped portions. A plurality of semiconductor chips may be stacked on the circuit board and engage with the stepped portions of the aligning guide. According to the disclosed semiconductor package, a large number of semiconductor chips may be stacked with high accuracy and sufficient margin. Therefore, the rate of failure and defects in the chip stacking process may be reduced and the reliability and stability of the semiconductor package may be enhanced.

Semiconductor package and method of manufacturing the same

A semiconductor chip bonding apparatus maintains a semiconductor chip in a parallel state with respect to a lead frame when applying a bonding load.

Semiconductor chip bonding apparatus

Growing community of inventors

Asan-si, South Korea

Yong-Dae Ha