Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Yong-Bum Kim

Dong-Hyun Yeo

Byung-Kil Jeon

Bong-Ju Jun

Byungkil Jeon

ByungKil Jeon

Su-Hyun Jeong

Eun-Seon Kim

Woojung Jung

Suk-Jin Park

Jaehyoung Park

Jae-Hyoung Park

Junpyo Lee

Jae-Gwan Jeon

Jang-Hyun Yeo

Jongman Kim

Suhyun Jeong

Chul Kyu Kim

Seung-Hwan Moon

Sung Jin Kim

Jin Sung Choi

Jae-Han Lee

Nam-Gon Choi

Dong-Won Park

Po-Yun Park

Tae-Gon Kim

Byoung-Jun Lee

Sun-Kyu Son

Sang Keun Lee

Jong-Keun Kim

Heebum Park

Hong-Kyu Kim

Akihiro Takegama

Joo-Hwan Park

Youngsoo Sohn

Hyun-Su Lee

Sang An Kwon

Byung Kil Jeon

Myung Bo Sim

Won-Tae Kim

Yongho Sung

A display device includes a display panel including a plurality of pixels, a gate driver configured to provide gate signals to the plurality of pixels, a data driver configured to provide data signals to the plurality of pixels, a correction data memory configured to store mura correction data, and a controller configured to control the gate driver and the data driver. The controller includes a pattern detection block configured to detect a set pattern in input image data, and a mura correction block configured to perform a mura correction operation that corrects the input image data based on the mura correction data in response to the set pattern not being detected, and to not perform the mura correction operation in accordance with the set pattern being detected.

Display device selectively performing a mura correction operation, and method of operating a display device

In a method of operating a display device supporting a variable frame mode, frame data are received during a constant active period of a frame period including the active period and a variable blank period, the received frame data are written to a frame memory in the active period, the received frame data are outputted to a data driver in the active period to display an image based on the received frame data, a time of the variable blank period is counted, and, when the time of the variable blank period reaches a predetermined threshold blank time, the frame data stored in the frame memory are outputted to the data driver in the variable blank period to display an image based on the frame data stored in the frame memory.

Method of operating a display device supporting a variable frame mode, and the display device

A display apparatus includes a display panel, a position detector, a driving controller, a gate driver and a data driver. The display panel is configured to display an image. The position detector is configured to determine a position of a user. The driving controller is configured to generate an overdriving value according to a grayscale value of previous frame data and a grayscale value of present frame data. The gate driver is configured to output gate signals to the display panel. The data driver is configured to output data voltages to the display panel based on the overdriving value.

Display apparatus and method of driving the same

Provided is a color compensation device of an electronic device including a first color converter, a parameter generator, an operator, and a second color converter. The first color converter receives an image signal, converts the image signal into initial tristimulus values based on a basic look-up table, and generates a conversion look-up table using the basic look-up table. The parameter generator extracts 2N number of representative parameters from the conversion look-up table and generates N number of compensation parameters on the basis of the 2N number of representative parameters. N is a natural number. The operator generates compensated tristimulus values at each gray scale using the N number of compensation parameters, generates a compensation look-up table, and converts the initial tristimulus values into the compensated tristimulus values using the compensation look-up table. The second color converter converts the compensated tristimulus values into a compensated image signal.

Color compensation device, electronic device including same, and color compensation method of electronic device

A display apparatus includes a signal controller, a panel driver, and a display panel. The signal controller includes N functional blocks that process input image signals to output image data signals and convert input control signals to internal control signals to output the internal control signals. The panel driver converts the image data signals to image data voltages in response to the internal control signals to output the image data voltages and outputs a gate driving voltage. The display panel receives the gate driving voltage and the image data voltages to display an image. A screen of the display panel includes a first area and a second area different from the first area. First input image signals corresponding to the first area among the input image signals are processed by I functional blocks (I is smaller than N) among the N functional blocks.

A driving unit of display panel includes a data driving part, a timing controlling part and a gate driving part. The data driving part is configured to receive reference image data and includes a first data driving circuit part having a first channel outputting a first reference data signal based on the reference image data and a k-th channel outputting a k-th reference data signal based on the reference image data. The timing controlling part is configured to detect a time difference between the first reference data signal and the k-th reference data signal. The gate driving part is configured to output a gate signal to each of gate lines. By delaying data signals based on the gate signal delay caused by long line load and RC delay, the present invention may improve display quality of a display device.

Method for driving display panel by outputting data signals according to delay signal, driving unit of display panel and display device having the same

A display apparatus includes a first interpolator configured to generate first correction data for a first polarity corresponding to an input data using a first look up table which stores correction data for the first polarity compensating for a luminance difference between the first polarity and a second polarity opposite to the first polarity of a data voltage for the sub pixel, a first delay compensator configured to apply a correction value to the first correction data for the first polarity and generate second correction data for the first polarity, the correction value compensating for an RC delay based on a pixel position corresponding to the input data.

Display apparatus and method of driving the display apparatus

An apparatus for monitoring pixel data includes a multiplexer configured to select pixel data applied to at least one of function blocks which is configured to convert the pixel data provided from an external device and adjust characteristics of a display device, a monitoring module configured to store the pixel data selected by the multiplexer, and an analyzing module configured to output a location selection signal to the multiplexer which provides the monitoring module with the pixel data based on the location selection signal, to read out the pixel data stored in the monitoring module by applying a pixel position signal to the monitoring module, and to analyze a variation of the read out pixel data.

Apparatus and method for monitoring pixel data and display system adopting the same

A timing controller for a display apparatus includes a dithering unit outputting a first signal in which bit widths of image signals are reduced, an image pattern detector detecting an image pattern of the image signals and outputting a dithering off signal corresponding to the detected image pattern, a dithering selector receiving the first signal and converts the first signal to a second signal in response to the dithering off signal, and a response time compensator generating a present image signal from the second signal and compensates a liquid crystal response time in accordance with a difference between the present image signal and a first previous image signal to output a data signal.

Timing controller with dithering capability dependent on a pattern and display device having the same

A display panel driving apparatus, including a gate driving part configured to output a gate signal to gate lines of a display panel, and a data driving part configured to output a data signal to a data line of the display panel, including a digital-analog converter, wherein the digital-analog converter is configured to convert a common voltage control data of digital format to a common voltage control voltage of analog format.

Display panel driving apparatus and display apparatus having the same

A display apparatus includes a plurality of pixels connected to a plurality of gate lines and a plurality of data lines and a timing controller, in which each pixel includes a first sub-pixel and a second sub-pixel. In such a display apparatus, the timing controller provides the first sub-pixel and the second sub-pixel with a first data signal and a second data signal corresponding to one of a high gray scale curve and a low gray scale curve, alternately every frame, when the image signal is a first type of image signal, and the timing controller provides the first sub-pixel with a first data signal corresponding to the high gray scale curve and the second sub-pixel with a second data signal corresponding to the low gray scale curve when the image signal is a first type of image signal.

Display apparatus and driving method thereof

A display device includes a display panel including gate lines, data lines, and pixels each connected to a corresponding gate line and a corresponding data line, a gate driver configured to drive the gate lines, a data driver configured to drive the data lines, and a timing controller configured to generate control signals to control the data driver and to apply a vertical synchronization start signal including a first pulse, a second pulse, a first gate pulse signal, and a second gate pulse signal to the gate driver. The gate driver applies gate driving signals to the gate lines to pre-charge the pixels in response to the first pulse of the vertical synchronization start signal and the first gate pulse signal, and to main-charge the pixels in response to the second pulse of the vertical synchronization start signal and the second gate pulse signal.

Display device

A semiconductor device includes a circuit board including a ground portion, and a semiconductor package disposed on the circuit board. The semiconductor package includes an external connecting pad and an exposed pad. The exposed pad and the ground portion are electrically connected at a first surface of the exposed pad. A semiconductor chip is disposed on a second surface of the exposed pad and electrically connected to the external connecting pad. The first surface of the exposed pad is located external to the semiconductor package, and the second surface of the exposed pad is located within the semiconductor package. A test pad is disposed on the semiconductor chip and is electrically connected to the exposed pad.

Semiconductor device having a test pad connected to an exposed pad

A timing controller includes a receiver, an internal clock generator, a first frequency converter, a first selector and a control signal generator. The receiver receives an image signal and a main clock signal having a first spread spectrum frequency from an external system, converts the main clock signal to a converted main clock signal and the image signal to a first converted image signal, and outputs the converted main clock signal as a first clock signal having a plurality of frequencies. The internal clock generator multiplies the frequencies of the first clock signal and generates a second clock signal having a frequency band within the multiplied frequencies of the first clock signal. The first frequency converter converts the second clock signal to a third clock signal having a second spread spectrum frequency. The first selector selects one of the second clock signal and the third clock signal in response to a first selection signal and outputs the selected one of the second clock signal and the third clock signal as a control clock signal. The control signal generator receives the control clock signal to generate a control signal synchronized with the control clock signal.

Timing controller, display apparatus including the same, and method of driving the same

A display apparatus includes a display panel, a plurality of gate lines driving circuit parts, a plurality of data lines driving circuit parts and a timing control part. The display panel includes a plurality of gate lines and a plurality of data lines. The gate lines driving circuit parts output gate signals to the gate lines. The data lines driving circuit parts output data signals to the data lines. The timing control part applies a dummy gate signal to at least one dummy gate line, controls a latch sequence of image data and an output sequence of the gate lines driving circuit parts in a reverse sequence, in response to an inverted-mounting mode selection signal for displaying an inverted mount image to the display panel. Because signal lines can be shortened, heat generated by the display apparatus may be decreased and image quality of the display apparatus may be improved.

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Suwon-si, South Korea

Yong-Bum Kim