Cadence Design Systems, Inc.

Yonatan Ashkenazi

Nadav Chazan

Tal Tabakman

Chung-Wah Norris Ip

Meir Ovadia

Andrew Robert Wilmot

Yaron Peri-Glass

Maayan Ziv

David Guoqing Zhang

Rodion Vladimirovich Melnikov

Ronen Shoham

Ynon Cohen

Vincent Motel

Yotam Gil

Nir Hadaya

Gavriel Leshem

Nir Paz

Yochi Bilitski

A method for identifying a potential cause of a failure in simulation runs on a design under test (DUT) using machine learning is disclosed.

Method and system for identifying potential causes of failure in simulation runs using machine learning

A method for assertion debugging may include identifying in signals relating to an execution run of a code a segment of time for which an assertion has failed. The method may also include searching in the signals relating to that execution run, or in signals relating to another execution run of that code, to find one or a plurality of segments of time in which the signals are similar to the signals in the identified segment, for which the assertion was successful.

Method and system for computerized debugging assertions

The present disclosure relates to a system and method for capturing log messages in a post-processing debugging environment. Embodiments may include receiving a processor model associated with an electronic design and generating, using one or more processors and the processor model, a complete view of the state of the memory. Embodiments may further include writing, using one or more processors and the processor model, a log message whenever a designated message logging function is reached within the complete view of the state of the memory.

Debugging process

A method for automated debugging of a design under test (DUT), including using a processor, (a) identifying a value of a signal at a specific time instance in which a user has indicated interest; (b) performing driver tracing based on structural analysis and signal analysis to determine one or a plurality of drivers of the identified value in the signal; (c) if the driver tracing returns a single driver of said one or a plurality of drivers, presenting the returned single driver to the user via an output device; and (d) if the driver tracing returns a plurality of drivers of said one or a plurality of drivers, performing formal analysis on a compiled sub-structure of the DUT to which all of said returned plurality of drivers are related to determine a single driver from said returned plurality of drivers, and presenting the determined single driver from said returned plurality of drivers to the user via the output device.

Method and system for automated debugging of a device under test

A method and system for debugging memory allocation and memory release may include recording execution events of an execution run of a program including data related to objects pertaining to that program, and data related to object association pertaining to that program at a plurality of points in time. The method may also include receiving via a user interface a user selection of an object of said objects. The method may further include identifying one or a plurality of pointers pointing from one or a plurality of objects at the selected object based on the recorded data related to object association and finding one or a plurality of execution events of said execution events corresponding to assignments of said one or a plurality of pointers. The method may further include distinctly marking a portion of the code, presented to the user on a display device, representing said one or a plurality of execution events that correspond to assignments of said one or a plurality of pointers.

Method and system for automated debugging memory allocation and memory release

A system and method of debugging a program may include obtaining a selection of a portion of the program which is between trackable inputs and outputs. The method may also include simulating an execution on the portion of the program, by providing input data via the inputs that was input through said inputs during a recorded execution of the program. The method may further include presenting information relating to the simulated execution on an output device.

Method and system for debugging a program

A system and method that implement an object-oriented model for requirements of a hardware design in order to verify the design. The object-oriented model abstractly captures the design topology, capability, control, and status of the design. An object-oriented model or definition of a hardware design is based on one or more specifications or standards implemented with the design. With the object-oriented model, a system and method for storing and displaying data captured during a test run is implemented. Graphical displays are defined to show run information for abstract objects of the design. Predefined graphical displays may be altered to accommodate the features of the object-oriented model and new graphical displays may be defined for objects in the model.

GUI based verification at multiple abstraction levels

A system and method are provided for enhanced navigation along execution time and code space in a debugger to assist a user in remediating errors, streamlining, or reverse engineering a computer program and the source code thereof. Snapshots of system states are recorded, a causality tree of commands is constructed through execution of the program to be debugged, and an intelligent display of system states captured during runtime and indexed or cross-referenced by time are displayed to the user in an intelligent manner to aid the user with certain debugging tasks. Additionally, further features in assisting the user to locate a root cause of an error or unexpected value and remediate that cause are also provided.

System and method for debugging computer program based on execution history

A computerized method for detecting errors in program code including searching for lines of command codes in the program code, wherein a line of command code includes a set of command codes and a set of indices; separating the sets of command codes from the sets of indices, wherein the sets of indices are a matrix; parsing the sets of command codes to locate three or more consecutive lines of command codes, which have the same sets of command codes; for the three or more consecutive lines of command codes, generating sets of vertical indices from vertically aligned indices in the matrix; determining if each set of vertical indices does not match at least one known series in a set of known series; and reporting to a user computer each set of vertical indices that does not match the at least one known series.

Detecting indexing errors in declarative languages

A method for detecting program code errors including searching for lines of command codes in the program code. A line of command code includes command codes and indices. The lines of command codes are organized as paragraphs. At least one of the lines of commands codes in each paragraph is different from the other lines of commands codes in the paragraph. The method further including separating the command codes from the indices for the lines of command codes, wherein the indices are a matrix of indices, and each row of indices in the matrix of indices includes the sets of indices for each of the lines of command codes from one of the paragraphs; determining each set of vertical indices in the matrix of indices that does not match a known series; and reporting to a user computer each set of vertical indices that does not match the known series.

Growing community of inventors

Rehovot, Israel

Yonatan Ashkenazi